Semiconductor memory device capable of compensating for leakage current

A semiconductor memory device including a plurality of memory arrays, the device comprising:

• a plurality of memory mats comprising each memory array;
• and
• a plurality of memory blocks comprising each memory mat,
• where the memory block comprises,
• plurality of phase-change memory cells disposed at intersections of word lines and bit lines;
• a plurality of dummy cell is connected to a first dummy bit line positioned in a first end of the memory block;
• a leakage compensation circuit that is connected to the first dummy bit line that outputs a leakage compensation current to at least one of the bit lines;
• and
• a read current supply circuit for outputting a read current necessary for a read operation to at least one of the bit lines in response to a first control signal.

A semiconductor memory device, comprising:

• a plurality of phase-change memory cells disposed at intersections of word lines and bit lines:
• a read current supply circuit for supplying a read current determined in a read operation to a sensing node connected to one of the bit lines;
• a leakage compensation circuit for generating a leakage compensation current based on an amount of leakage current flowing through on-selected memory cells connected to the same one of the bit lines, and for applying the leakage compensation current to the sensing node;
• arid
• a sense amplifier circuit for comparing a voltage of the sensing node, to which the leakage compensation current was applied, with a sensing reference voltage, and for performing a data read opera don for a selected memory cell.

A read operation method in a phase-change memory device having a plurality of phase-change memory cells disposed at intersections of word lines and bit lines, the method comprising:

• applying a read current to the bit line of a selected memory cell;
• sensing leakage current for non-selected memory cells connected to the same bit line;
• generating a leakage compensation current corresponding to an amount of the leakage current, and applying the leakage compensating current to a sensing node;
• comparing a voltage of the sensing node, to which the leakage compensation current was applied, with a sensing reference voltage;
• and
• reading out data stored in the selected memory cell.