Bit-detection arrangement and apparatus for reproducing information

Bit-detection arrangement able to convert an analog signal (AS) having an amplitude into a digital signal (DS) representing a bit sequence from which the analog signal (AS) is derived, comprising:

• a quantizer (11) able to produce an output signal S1 by quantizing the amplitude of the analog signal (AS), and
• a phase detector PD1 (12) able to determine a phase difference ΔP1 between the output signal S1 and a clock signal C2, and able to generate an output signal PH2 having an amplitude, where the amplitude of PH2 indicates the phase difference ΔP1,
• an analog to digital converter ADC (13) which is able to output a processed signal (PrS) by sampling the output signal PH2 at a sample rate controlled by a clock signal C1 having a frequency which is equal to the frequency of clock signal C2 divided by a factor n,
• a digital phase locked loop DPLL (2) able to lock on the processed signal (PrS) and able to output a phase signal PH1 using the clock signal C1, and
• a bit decision unit (3) able to output the digital signal (DS) and a clock signal C3 using the phase signal PH1, the clock signal C1 and the output signal S1, comprising a sample and hold unit SH1 able to sample the output signal S1, using a clock signal CSH1 having a frequency equal to the frequency of clock signal C2, and to hold n samples, sampley=1 through sampley=n, of-the output signal S1 for a clock period of clock signal C1, n being the division factor of clock signal C2, where n is an integer greater than one, characterized in that the bit decision unit further comprises
• at least one additional sample and hold unit SH2 able to sample the output signal S1, using a clock signal CSH2 and wherein the frequency of the clock signal CSH2 is equal to the frequency of clock signal CSH1 and the phase of clock signal CSH2 is substantially different from the phase of clock signal CSH1, and
• an output unit for outputting samples of either the sample and hold units SH1 or SH2, wherein the samples of the sample and hold unit SH1 are outputted when the phase signal PH1 indicates that the phase difference ΔP1 is in a first region and the samples of the additional sample and hold unit SH2 are outputted when the phase signal PH1 indicates that the phase difference ΔP1 is in a second region.