Devices and methods for controlling a slew rate of a signal line
AssigneeMicron Technology, Inc.
InventorEbrahim H. Hargan
Life of this patent
Estimating the term…
Abstract
In one aspect of the invention, a method of reducing intersymbol interference on a signal line is disclosed. A state machine records previous bits that were transmitted over the line. If the bit on the line has been static for several clock cycles, the slew rate will be increased to facilitate correct reading of the bit for the next clock cycle. If the bit on the line has been dynamic for the previous bits, the slew rate will be a lower slew rate to avoid crosstalk between neighboring lines.
Claims20
A method of increasing bit valid time on a signal line, the method comprising:
- tracking values of a sequence of bits received by a driving device and transmitted on a signal line by the driving device;
- determining a current state of the signal line based on the values of a selected number of most recently received bits in the sequence on the signal line;
- and
- adjusting a slew rate of the driving device in response to the current state of the signal line and in response to a value of a next bit in the sequence of bits.
A memory device comprising:
- input;
- an output configured to transmit on a signal line a sequence of data bits received by the input;
- and
- a module configured to monitor the sequence of data bits and to output a slew rate control signal based on at least two most recent bits in the sequence of bits and a next bit in the sequence of bits.
A memory device for adjusting a slew rate of a bit sequence on a signal line, the memory device comprising:
- means for tracking values of a sequence of bits received by the memory device and transmitted on a signal line by the memory device;
- means for determining a current state of the signal line based on the values of a selected number of most recently received bits in the sequence of bits on the signal line;
- and
- means for outputting a slew rate control signal based on the current state of the signal line and on a value of a next bit in the sequence of bits.
Dependencies are inferred from the claim text.