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US 7,248,078 B2Granted
Semiconductor device
AssigneeNEC Electronics Corporation
InventorTsuyoshi Mitsuda
Life of this patent
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Abstract
The semiconductor device according to the present invention comprises an output MOS transistor M0, an MOS transistor M3 connected between a gate G1 of the output MOS transistor M0 and a ground voltage GND, a parasitic transistor Tr1 which is formed in parallel with the MOS transistor M3 with the substrate terminal of the MOS transistor M3 as a base, and a parasitic transistor control circuit for controlling the conducting status of the parasitic transistor Tr1 based on the power supply voltage Vcc.
Claims16
A semiconductor device, comprising:
- an output transistor connected between a first power supply terminal and an output terminal, and passing an output current in accordance with a signal applied to a current control terminal thereof;
- an over current protection element connected between the current control terminal and a second power supply terminal;
- a first detection circuit applied with a voltage through the first power supply terminal, detecting a current flowing through the output transistor to provide a detection signal to a first control terminal of the over current protection element;
- and
- a second detection circuit applied with a voltage through the first power supply terminal, detecting a current flowing through the output transistor to provide a detection signal to a second control terminal of the over current protection element, and operating at a voltage lower than the first detection circuit.
2 more elements
Dependencies are inferred from the claim text.