Time limit function utilization apparatus
AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi Watanabe, Kazuya Matsuzawa, Riichiro Shirota
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Abstract
A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.
Claims20
A semiconductor integrated circuit comprising:
- an aging circuit configured by series-connecting a plurality of aging devices in which an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time, each of the aging devices including two diffusion layers as an input portion and an output portion, and neighboring ones of the aging devices sharing one of the two diffusion layers to be connected in series;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal.
A semiconductor integrated circuit comprising:
- an aging circuit configured by series-connecting a plurality of aging devices in which an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal,
- wherein when a time until an output signal from each of the aging devices reaches a predetermined level is defined as a life time of each of the aging devices and a time until the output signal from the aging circuit reaches a level of the reference signal is defined as a life time of the aging circuit, the level of the reference signal is so set as to make the life time of the aging circuit longer than an average life time of the aging devices.
A semiconductor integrated circuit, comprising:
- an aging circuit configured by series-connecting a plurality of aging devices in which
- an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal,
- wherein the aging circuit comprises a first sub-aging circuit configured by series-connecting a plurality of parallel-connected first aging devices in which the output signal increases over time, and a second sub-aging circuit configured by series-connecting a plurality of parallel-connected second aging devices in which the output signal decreases over time,
- the first sub-aging circuit and the second sub-aging circuit are series- connected, and
- when a time until the output signal from the first sub-aging circuit reaches a first predetermined level is defined as a life time of the first sub-aging circuit and a time until the second sub-aging circuit reaches a second predetermined level is defined as a life time of the second sub-aging circuit, the life time of the first sub-aging circuit is shorter than the life time of the second sub-aging circuit.
A semiconductor integrated circuit comprising:
- an aging circuit configured by series-connecting a plurality of aging devices in which an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal,
- wherein the aging circuit comprises a first sub-aging circuit configured by series-connecting a plurality of parallel-connected first aging devices in which the output signal increases over time, and a second sub-aging circuit configured by series-connecting a plurality of parallel-connected second aging devices in which the output signal decreases over time,
- the first sub-aging circuit and the second sub-aging circuit are parallel-connected, and
- when a time until the output signal from the first sub-aging circuit reaches a pre-determined level is defined as a life time of the first sub-aging circuit and a time until the second sub-aging circuit reaches the predetermined level is defined as a life time of the second sub-aging circuit, the life of the first sub-aging circuit is longer than the life time of the second sub-aging circuit.
A semiconductor integrated circuit comprising:
- an aging circuit configured by series-connecting a plurality of aging devices in which an age-based change occurs while a power supply is disconnected, and an output signal sensed in read changes over time;
- and
- a sense circuit comparing the output signal from the aging circuit with a reference signal,
- wherein the aging circuit comprises N sub-aging circuits each having a different life time from others defined by a time until an added output signal from the plurality of aging devices within each of the N sub-aging circuits reaches a predetermined reference signal set for each of the N sub-aging circuits, and
- the sense circuit compares a serial addition of the added output signal from each of the N sub-aging circuits with the predetermined reference signal, and senses whether or not each of the N sub-aging circuit closes a life time thereof.
Dependencies are inferred from the claim text.