A process for fabricating a semiconductor device comprising a support plate, an integrated circuit chip placed at a certain location on the support plate and placed at a certain distance from this support plate, a plurality of electrical connection balls connecting electrical connection regions of the support plate and corresponding electrical connection pads on the chip, and a fill material at least partly filling the space separating the chip from the plate, the method comprising:
- providing the surface of the support plate having the electrical connection regions with an interlayer made of an insulating material;
- providing, in this interlayer, apertures directly above the electrical connection regions and complementary flow channels including at least one peripheral flow channel that passes directly above the connection regions and connects to the apertures, and radial flow channels that extend outwardly from a central part of the certain location and are connected to the at least one peripheral flow channel;
- depositing at least one drop of the fill material in liquid state at the central part of the certain location;
- bringing the chip into place above the support plate at the certain location and lowering the chip in such a way that the drop flows from the central part of the certain location in the complementary flow channels and over the support plate and at least partly fills the empty space between the chip and the surface of the support plate;
- and
- soldering the balls and curing the fill material.