Method of controlling grain size in a polysilicon layer and in semiconductor devices having polysilicon structures
AssigneeInternational Business Machines Corporation
InventorsPeter J. Geiss, Joseph R. Greco, Richard S. Kontra, Emily Lanning
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Abstract
A method of modulating grain size in a polysilicon layer and devices fabricated with the method. The method comprises forming the layer of polysilicon on a substrate; and performing an ion implantation of a polysilicon grain size modulating species into the polysilicon layer such that an average resultant grain size of the implanted polysilicon layer after performing a pre-determined anneal is higher or lower than an average resultant grain size than would be obtained after performing the same pre-determined anneal on the polysilicon layer without a polysilicon grain size modulating species ion implant.
Claims16
A bipolar transistor, comprising:
- a single-crystal subcollector in direct contact with a bottom surface of a single-crystal collector;
- a single-crystal intrinsic base comprising a doped silicon-germanium layer between an undoped silicon-germanium layer and an undoped silicon layer;
- a single-crystal pedestal collector within said single-crystal collector and in direct physical contact with a bottom surface of said undoped silicon-germanium layer;
- a single-crystal emitter in said undoped silicon layer, said single-crystal emitter extending from a top surface of said undoped silicon layer to said doped silicon-germanium layer;
- and
- a polysilicon emitter containing a dopant species and a polysilion grain size modulating species, said polysilion emitter in direct physical contact with a top surface of said single-crystal emitter.
Dependencies are inferred from the claim text.