Semiconductor pickup device comprising pixel circuits having a varying frame rate
AssigneeFusayoshi Hirotsu
InventorJunichi Hirotsu
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AssigneeFusayoshi Hirotsu
InventorJunichi Hirotsu
Estimating the term…
A semiconductor pickup device includes a pixel circuit including: a photodiode passing to a prescribed node a current of a value corresponding to intensity of light received; a log transistor operating in a log region when the prescribed node is increased in potential; and a reset transistor operative for the prescribed node's potential higher than a threshold potential to reset in response to a reset signal the prescribed node's potential to a reset potential, and operative for the prescribed node's potential lower than the threshold potential to avoid the resetting. For low illuminance the pixel circuit decreases in frame rate and lower minimum illuminance required for pickup can be provided.
A semiconductor pickup device comprising a plurality of pixel circuits arranged in a matrix and each outputting a potential corresponding to intensity of light received by said pixel circuit, wherein:
A semiconductor pickup device comprising a plurality of pixel circuits arranged in a matrix and each outputting a potential corresponding to intensity of light received by said pixel circuit, wherein:
A semiconductor pickup device comprising a plurality of pixel circuits arranged in a matrix and each outputting a potential corresponding to intensity of light received by said pixel circuit, wherein:
A semiconductor pickup device comprising a plurality of pixel circuits arranged in a matrix and each outputting a potential corresponding to intensity of light received by said pixel circuit, wherein:
Dependencies are inferred from the claim text.
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Involving a non-linear response: the logarithmic type
Control of the SSIS exposure: control of the dynamic range
Pictorial communication
Term ended 20 May 2025 (estimated)
1. Field of the Invention
The present invention relates generally to semiconductor pickup devices and particularly to those having a plurality, of pixel circuits arranged in a matrix.
2. Description of the Background Art
FIG. 1 is a block diagram showing a configuration of the present semiconductor pickup device in a first embodiment.
FIG. 2 is a circuit diagram showing a configuration of a pixel circuit shown in FIG. 1.
FIG. 3 represents VDS-IDS characteristic of a log transistor shown in FIG. 2.
FIG. 1 is a block diagram showing a configuration of the present semiconductor pickup device in a first embodiment. In the figure the semiconductor pickup device includes a pixel array 2 including a plurality of pixel circuits 1 arranged in rows and columns, a read circuit 3, and a reset signal generation circuit 4. Pixel array 2 externally receives a power supply potential VDD, a ground potential GND and a reset potential VRL. Reset potential VRL may be generated internal to the semiconductor pickup device.
Pixel circuit 1 performs photoelectric conversion to output a potential VP corresponding to receive light's intensity. Read circuit 3 reads potential VP output from each pixel circuit 1. Reset signal generation circuit 4 generates a reset signal RST and provides the signal to each pixel circuit 1. Reset signal RST may externally be introduced.
FIG. 2 is a circuit diagram showing a configuration of pixel circuit 1. In the figure, pixel circuit 1 includes a photodiode 10, a log transistor 11, a reset transistor 12 and a read transistor 13. Photodiode 10 has a cathode connected to a line of power supply potential VDD and an anode to a node N10. Photodiode 10 passes a current of a value proportional to receive light's intensity.