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US 7,247,538 B2Granted
Methods of fabricating floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers
AssigneeSamsung Electronics Co., Ltd.
InventorsChang-Hyun Lee, Jung-Dal Choi, Byoung-Woo Ye
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Abstract
Floating trap non-volatile memory devices and methods are provided. The memory devices include a semiconductor substrate and an adjacent gate electrode. Between the substrate and the gate electrode may be a tunneling insulating layer having a first dielectric constant, a blocking insulating layer having a second dielectric constant that is greater than the first dielectric constant, and a charge storage layer.
Claims13
A method of fabricating a floating trap non-volatile memory device comprising:
- providing a semiconductor substrate;
- forming a tunneling insulating layer having a first dielectric constant on the substrate;
- forming a charge storage layer on the tunneling insulating layer;
- forming a blocking insulating layer on the charge storage layer, the blocking insulating layer having a second dielectric constant which is greater than the first dielectric constant of the tunneling insulating layer;
- and
- forming a gate electrode on the blocking insulating layer.
3 more elements
Dependencies are inferred from the claim text.