Two-sided wafer escape package

A method of forming an electronic component package comprising:

• providing an electronic component, the electronic component having a plurality of bond pads formed on a first surface of the electronic component;
• forming electrically conductive traces connecting first selected bond pads of the plurality of bond pads on the first surface of the electronic component to corresponding bonding locations on a second surface of the electronic component;
• coupling the first surface of the electronic component to a first surface of a lower dielectric strip with an adhesive;
• coupling the second surface of the electronic component to a first surface of an upper dielectric strip with an adhesive;
• forming lower via apertures through the lower dielectric strip and the adhesive to expose second selected bond pads of the plurality of bond pads on the first surface of the electronic component;
• forming upper via apertures through the upper dielectric strip to expose the bonding locations on the second surface of the electronic component;
• filling the lower via apertures with an electrically conductive material to form lower vias electrically coupled to the second selected bond pads of the plurality of bond pads on the first surface of the electronic component;
• and
• filling the upper via apertures with an electrically conductive material to form upper vias electrically coupled to the bonding locations on the second surface of the electronic component.