Bandpass amplifier

A filter circuit, fabricated on a single chip to have gain and filter performance in a microwave to millimeter-wave range, comprising:

• an amplifier having three terminals;
• an input match unit, used for matching a gain of an amplifier, having a low pass filter response;
• a first bias unit, electrically connected to the input match unit, used for driving a first terminal of the amplifier and having a high pass filter response;
• a gain stage, electrically connected to the first bias unit, a resistor, a fifth inductor and a first capacitor in series connected between two terminals of the gain stage, for providing a flat gain of the amplifier;
• a second bias unit, electrically connected to the gain stage, used for driving a second terminal of the amplifier and having a second high pass filter response;
• and
• an output match unit, electrically connected to the second bias unit, used for matching the gain of the amplifier and having a second low pass filter response;
• where both the input match unit and the output match unit comprise two first inductors with an inductance L1, one second inductor with an inductance L2 and two second capacitors with a capacitance C2, for determining a cutoff frequency ωcT and a transmission-zero frequency ωzT of the low pass filter response, and
• wherein both the first bias unit and the second bias unit comprise a fourth inductor with an inductance L4, a third capacitor with an inductance C3 and a fourth capacitor with a capacitance C4, for determining a cutoff frequency ωcL and a transmission-zero frequency ωzL of the high pass filter response.

A receiver comprising an antenna, a first bandpass amplifier, a mixer having an associated local oscillator, a second bandpass amplifier, and a detector means for determining whether a particular signal has been received,

• wherein the first and second bandpass amplifiers are fabricated on a single chip to have gain and filter performance in the microwave to millimeter-wave range, each comprises
• an input match unit, used for matching a gain of the amplifier and having a low pass filter response;
• a first bias unit, electrically connected to the input match unit, used for driving a first terminal of the amplifier and having a high pass filter response;
• a gain stage, electrically connected to the first bias unit, a resistor, a fifth inductor and a first capacitor in series connected between two terminals of the gain stage, for providing the flat gain of the amplifier;
• a second bias unit, electrically connected to the gain stage, for driving a second terminal of the amplifier and having the high pass filter response;
• and
• an output match unit, electrically connected to the second bias unit, used for matching the gain of the amplifier and having the low pass filter response;
• where both the input match unit and the output match unit comprise two first inductors with an inductance L1, one second inductor with an inductance L2 and two second capacitors with a capacitance C2 for determining a cutoff frequency ωcT and a transmission-zero frequency ωzT of the low pass filter response, and
• wherein both the first bias unit and the second bias unit comprise a fourth inductor with an inductance L4, a third capacitor with an inductance C3 and a fourth capacitor with a capacitance C4, for determining a cutoff frequency ωcL and a transmission-zero frequency ωzL of the high pass filter response.