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US 7,236,113 B1Granted
Capacitance-to-digital modulator with sensor failure-mode detection
AssigneeEmerson Process Management
InventorRongtai Wang
Life of this patent
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Abstract
A pressure transmitter having a capacitance-to-digital modulator produces an output as a function of sensor capacitance and a reference capacitance. Transmitter also includes a sensor failure mode detector produces an output signal and identifies failure modes of the sensor capacitance and reference capacitance.
Claims31
A capacitance-to-digital (CD) modulator for converting a sensor capacitance CS and a reference capacitance CR to a pulse code modulated (PCM) signal, the CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets in CS and CR during a first phase, and integrating charge from CS and CR during a second phase to produce a first stage output VOUT1, wherein the first stage sigma-delta integrator includes a feedback capacitor for having a capacitance CF1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- a quantizer for converting the second stage output VOUT2 to the PCM signal;
- and
- a sensor failure mode detection (SFD) circuit for deriving from VOUT1 an SFD signal that identifies failure modes of CS and CR, wherein the SFD signal is representative of a capacitance ratio CR/CF1.
2 more elements
A pressure transmitter comprising:
- a sensor capacitance;
- a reference capacitance;
- a primary capacitance-to-digital (CD) modulator for producing a pulse code modulated signal PCMP representative of sensed pressure, the primary CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets as a function of sensor and reference capacitances, and integrating the charge packets to produce a first stage output VOUT1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- a quantizer for converting the second stage output VOUT2 to the PCMP signal;
- and
- a secondary modulator for sampling VOUT1 and producing a pulse code modulated signal PCMR indicative of whether the sensor capacitance and the reference capacitance are in a failure mode, wherein the signal PCMR is representative of a capacitance ratio CR/CF1, where CR is the reference capacitance and CF1 is capacitance of a feedback capacitor of the first stage sigma-delta integrator.
5 more elements
A capacitance-to-digital (CD) modulator for converting a sensor capacitance CS and a reference capacitance CR to a pulse code modulated (PCM) signal, the CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets in CS and CR during a first phase, and integrating charge from CS and CR during a second phase to produce a first stage output VOUT1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- a quantizer for converting the second stage output VOUT2 to the PCM signal;
- and
- a sensor failure mode detection (SFD) circuit for deriving from VOUT1 an SFD signal that identifies failure modes of CS and CR, wherein the SFD circuit comprises:
- an SFD integrator for sampling VOUT1 and producing an output VOUT3;
- an SFD quantizer for converting VOUT3 to the SFD signal;
- and
- an SFD control unit for providing an SFD excitation signal to the SFD integrator as a function of the SFD signal.
6 more elements
A capacitance-to-digital (CD) modulator for converting a sensor capacitance CS and a reference capacitance CR to a pulse code modulated (PCM) signal, the CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets in CS and CR during a first phase, and integrating charge from CS and CR during a second phase to produce a first stage output VOUT1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- a quantizer for converting the second stage output VOUT2 to the PCM signal;
- and
- a sensor failure mode detection (SFD) circuit for deriving from VOUT1 an SFD signal that identifies failure modes of CS and CR, wherein the SFD circuit comprises an over-sampling analog-to-digital converter for sampling VOUT1, and wherein the SFD circuit is active when CR is connected to the first stage sigma-delta integrator.
2 more elements
A pressure transmitter comprising:
- a sensor capacitance;
- a reference capacitance;
- a primary capacitance-to-digital (CD) modulator for producing a pulse code modulated signal PCMP representative of sensed pressure, the primary CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets as a function of sensor and reference capacitances, and integrating the charge packets to produce a first stage output VOUT1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- a quantizer for converting the second stage output VOUT2 to the PCMP signal;
- and
- a secondary modulator for sampling VOUT1 and producing a pulse code modulated signal PCMR indicative of whether the sensor capacitance and the reference capacitance are in a failure mode, wherein the secondary modulator comprises:
- an integrator for sampling VOUT1 and producing an output VOUT3;
- a quantizer for converting VOUT3 to the signal PCMR;
- and
- a control unit for providing an excitation signal to the integrator as a function of the signal.
9 more elements
A pressure transmitter comprising:
- a sensor capacitance;
- a reference capacitance;
- a primary capacitance-to-digital (CD) modulator for producing a pulse code modulated signal PCMP representative of sensed pressure, the primary CD modulator comprising:
- a first stage sigma-delta integrator for selectively forming charge packets as a function of sensor and reference capacitances, and integrating the charge packets to produce a first stage output VOUT1;
- a second stage sigma-delta integrator for sampling the first stage output VOUT1, and integrating the sampled first stage output to produce a second stage output VOUT2;
- and
- a quantizer for converting the second stage output VOUT2 to the PCMP signal;
- and
- a secondary modulator for sampling VOUT1 and producing a pulse code modulated signal PCMR indicative of whether the sensor capacitance and the reference capacitance are in a failure mode, wherein the secondary modulator is active when the reference capacitance is connected to the first stage sigma-delta integrator.
6 more elements
Dependencies are inferred from the claim text.