Semiconductor device including a superlattice and adjacent semiconductor layer with doped regions defining a semiconductor junction
AssigneeRJ Mears, LLC
InventorsRobert J. Mears, Robert John Stephenson
Life of this patent
Estimating the term…
Loading patent…
AssigneeRJ Mears, LLC
InventorsRobert J. Mears, Robert John Stephenson
Estimating the term…
A semiconductor device may include a superlattice comprising a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer thereon. The energy band-modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base silicon portions. The semiconductor device may further include a semiconductor layer adjacent the superlattice and comprising at least one first region therein including a first conductivity type dopant. The superlattice may also include at least one second region therein including a second conductivity type dopant to define, with the at least one first region, at least one semiconductor junction.
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.