Alignment of MTJ stack to conductive lines in the absence of topography

A method of manufacturing a magnetic memory device, comprising:

• providing a workpiece, the workplace including a plurality of die regions, each die region comprising an alignment mark region at the edges thereof, and an array region disposed within the alignment mark region;
• forming a first insulating layer over the workpiece;
• forming at least one first alignment mark over the alignment mark region of the workpiece and a plurality of first conductive lines over the array region of the workpiece within the first insulating layer, the at least one first alignment mark being filled wit a conductive material;
• forming a second insulating layer over the at least one first alignment mark, the plurality of first conductive lines, and the first insulating layer;
• forming a conductive via in the second insulating layer over the array region of the workpiece using a first lithography mask;
• forming at least one second alignment mark within at least the second insulating layer over the alignment mark region of the workpiece using a second lithography mask, the second lithography mask being different from the first lithography mask, the at least one second alignment mark comprising a trench having a bottom and sidewalls, the at least one second alignment mark not being disposed over the at least one first alignment mark;
• depositing a first magnetic stack over the at least one second alignment mark mid the second insulating layer, the first magnetic stack lining the bottom and sidewalls of the trench of the at least one second alignment mark, leaving a depression in the first magnetic stack over the at least one second alignment mark;
• depositing a first masking layer over the first magnetic stack;
• patterning the first masking layer using a lithography mask or tool, removing the first masking layer from over the at least one first alignment mark, using the depression over the at least one second alignment mark to align the lithography mask or tool used to pattern the first masking layer over the first magnetic stack;
• removing the first magnetic stack from over the at least one first alignment mark using the first masking layer as a mask;
• removing the first masking layer;
• depositing a second masking layer over the first magnetic stack and the at least one first alignment mark;
• patterning the second masking layer with a pattern for the first magnetic stack using the at least one first alignment mark for alignment;
• and
• patterning the first magnetic stack using the second masking layer as a mask.

A semiconductor device, comprising:

• a workpiece, The workpiece including a first region and a second region;
• a first insulating layer disposed over the workpiece;
• at least one first alignment mark disposed over the first region of the workpiece and a plurality of first conductive lines disposed over the second region of the workpiece within the first insulating layer, the at least one first alignment mark being filled with a conductive material;
• a second insulating layer disposed over the at least one first alignment mark, the plurality of first conductive lines, and the first insulating layer;
• at least one second alignment mark disposed within the second insulating layer and a portion of the first insulating layer over the first region of the workpiece, the at least one second alignment mark comprising a trench having a bottom and sidewalls;
• and
• an opaque material layer disposed over the second insulating layer, and over the at least one second alignment mark, the opaque material layer lining the bottom and sidewalls of the trench of the second alignment mark, leaving a depression in the opaque material layer over the second alignment mark.