Fully differential input buffer with wide signal swing range

A differential input buffer, comprising:

• a first main input transistor pair that receives a first voltage input;
• a second main input transistor pair that receives a second voltage input;
• a first tail current source;
• a second tail current source;
• a first squeezable tail current source circuit coupled to the first main input transistor pair and to the first tail current source, the first squeezable tail current source circuit including a first single-ended self-biased folded feedback loop;
• and
• a second squeezable tail current source circuit coupled to the second main input transistor pair and to the second tail current source, the second squeezable tail current source circuit including a second single-ended self-biased folded feedback loop,
• wherein the first main input transistor pair, the first tail current source, and the first squeezable tail current source circuit are configured such that current through the first main input transistor pair is maintained as the first voltage input varies;
• and
• wherein the second main input transistor pair, the second tail current source, and the second squeezable tail current source circuit are configured such that current through the second main input transistor pair is maintained as the second voltage input varies.

A method of maintaining a constant current through a main input transistor pair of a differential amplifier while maintaining high linearity, the method comprising:

• providing a voltage input to the main input transistor pair;
• mirroring a tail current to that of the current through the main input transistor pair by using a squeezable tail current source configured to isolate a bias transistor and a first transistor pair of the squeezable tail current source from a drain voltage of a second transistor pair of the squeezable tail current source, thereby causing the second transistor pair and the main input transistor pair to have a common drain bias;
• and
• squeezing the tail current as the voltage input is decreased, thereby increasing a gate voltage of the bias transistor and allowing current through the main input transistor pair to remain nearly constant.