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US 7,193,886 B2Granted
Integrated circuit with a memory of reduced consumption
AssigneeDolfin Integration
InventorsAndréa Bonzo, Jean-François Pollet
Life of this patent
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Abstract
An integrated circuit comprising volatile memory elements, interface circuits connected to the volatile memory elements and, possibly, logic circuits not connected to the volatile memory elements and comprising first, second, and possibly third separate power supplies, the first power supply being connected to the volatile memory elements, the second power supply being connected to the interface circuits with the memory elements, and the third power supply being connected to other logic circuits.
Claims7
An integrated circuit comprising:
- volatile memory elements comprising MOS transistors of a first type,
- logic interface circuits connected to the volatile memory elements and comprising MOS transistors of a second type different from the first type,
- first and second separate power supplies, the first power supply being connected to the volatile memory elements and the second power supply being connected to the logic interface circuits,
- additional logic circuits, and
- a third power supply, separate from the first and second power supplies, connected to the additional logic circuits,
- wherein, in a first operating mode, the third power supply is turned off and the first and second power supplies are maintained at a non-zero level.
3 more elements
Dependencies are inferred from the claim text.