Different register data indicators for each of a plurality of central processing units
AssigneeIntel Corporation
InventorDavid K. Vavro
Life of this patent
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Abstract
A digital signal processor may include a plurality of processing elements that are coupled together to accomplish a specialized function. Each processing element may utilize the same shared storage in a form of a plurality of general purpose registers. Each of these registers may be accessed by any of the processing elements. Each register may include a data storage section and a plurality of storage areas for data valid bits that indicate whether the data is valid or not for each of the plurality of processing elements.
Claims17
A method comprising:
- providing a register accessible by a plurality of central processing units;
- and
- indicating whether data in said register is available for a given central processing unit by providing different indicators assigned to each of a plurality of central processing units and causing the given central processing unit to reset its indicator when the data in said register is no longer useful to the given central processing unit.
A computer readable medium storing instructions that, when executed, enable a processor-based system to:
- make a register accessible by a plurality of central processing units in said system;
- provide different indictors for each of a plurality of central processing units;
- indicate whether data in said register is available for a given processing unit;
- and
- cause the given central processing unit to reset its indicator when data in the register is no longer useful for the given central processing unit.
Dependencies are inferred from the claim text.