Switching activity reduced coding for low-power digital signal processing circuitry
AssigneeBroadcom Corporation
InventorChristian Lutkemeyer
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AssigneeBroadcom Corporation
InventorChristian Lutkemeyer
Estimating the term…
A system and method for reducing power consumption in digital circuitry by reducing the amount of unnecessary switching in such circuitry. An aspect of the present invention provides a switching-reduction circuit that outputs a signal to a subsequent digital circuit. The value of the signal may depend on the relevance of the signal value to a next output of the subsequent digital circuit. A method according to various aspects of the present invention includes receiving a next input signal. The method further includes determining whether the next input signal may be relevant to a next output of a subsequent digital circuit. The method further includes providing the next input signal to the subsequent digital circuit when the next input signal may be relevant to the next output of the subsequent digital circuit, and providing a previous signal to the subsequent digital circuit when the next input signal will not be relevant to the next output of the subsequent digital circuit.
A reduced-switching multiplier circuit comprising:
A method for reducing unnecessary switching in a subsequent digital circuit, the method comprising:
A switching-reduction circuit for reducing unnecessary switching in a subsequent digital signal processing circuit (SDSPC), the switching-reduction circuit comprising:
A finite impulse response filter comprising:
A method for reducing power consumption in a Booth-type multiplier circuit having a pre-coder stage and a multiplier stage, the method comprising:
Dependencies are inferred from the claim text.