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AssigneeSanDisk 3D LLC
InventorsLuca G. Fasoli, Roy E. Scheuerlein
Estimating the term…
A monolithic integrated circuit includes a memory array having first and second groups of NAND strings, each NAND string comprising at least two series-connected devices and coupled at one end to an associated global array line. NAND strings of the first and second groups differ in at least one physical characteristic, such as the number of series-connected devices forming the NAND string, but both groups are disposed in a region of the memory array traversed by a plurality of global array lines. The memory array may include a three-dimensional memory array having more than one memory plane. Some of the NAND strings of the first group may be disposed on one memory plane, and some of the NAND strings of the second group may be disposed on another memory plane. In some cases, NAND strings of both groups may share global array lines.
A monolithic integrated circuit comprising a memory array, said memory array comprising first and second groups of NAND strings, each NAND string comprising at least two series-connected devices and coupled at one end thereof to an associated global array line, wherein NAND strings of the first group differ in at least one physical characteristic from NAND strings of the second group, wherein NAND strings of both the first and second group are disposed in a region of the memory array traversed by a plurality of global array lines, and wherein the second group of NAND strings are configured to store configuration data hidden during normal operation of the integrated circuit.
A monolithic integrated circuit comprising a memory array, said memory array comprising first and second groups of NAND strings, each NAND string comprising at least two series-connected devices and coupled at one end thereof to an associated global array line, wherein NAND strings of the first group differ in at least one physical characteristic from NAND strings of the second group, wherein NAND strings of both the first and second group are disposed in a region of the memory array traversed by a plurality of global array lines, wherein the physical characteristic comprises the respective number of series-connected devices forming the respective NAND string, and wherein NAND strings of the first group have a larger number of series-connected devices than NAND strings of the second group, and wherein:
Dependencies are inferred from the claim text.