Delta-sigma modulators with double sampling input networks and systems using the same

A method of sampling an input signal in a delta-sigma modulator having at least an integrator stage and a feedback digital-to-analog converter (DAC) stage, comprising:

• sampling an input signal at a sampling rate by alternately utilizing two sampling capacitors during two sampling cycles such that the two sampling capacitors are utilized at half of the sampling rate;
• alternately transferring samples from each of the two sampling capacitors at half the sampling rate to an intermediate node for summation with feedback samples provided by the feedback DAC stage at the sampling rate;
• and
• outputting samples summed at the intermediate node from the integrator stage at the sampling rate from the integrator stage.

A method of operating a delta-sigma modulator comprising at least one filter stage, a quantizer, and a feedback loop providing complementary feedback signals, comprising:

• during alternating cycles performed at half the loop rate, charging first and second capacitors respectively from first and second inputs during a sampling phase and cross-coupling the first and second capacitors respectively with the second and first inputs during a charge transfer phase to transfer charge respectively from the first and second capacitors to first and second intermediate nodes;
• during other alternating cycles performed at half the loop rate, charging the first and second capacitors respectively from the second and first inputs during a sampling phase and cross-coupling the first and second capacitors respectively with the first and second inputs during a charge transfer phase to transfer charge respectively from the second and first capacitors to the first and second intermediate nodes;
• and
• transferring to operational amplifier summing nodes at the loop rate the charge at the first and second intermediate nodes along with the complementary feedback signals received at the intermediate nodes directly from the feedback loop at the loop rate.