Queue management

An article comprising a machine-readable medium that stores machine-executable instructions for managing a queue array, the instructions causing a machine to:

• store addresses corresponding to a plurality of data buffers having a corresponding number of cells in a queue configured as a linked list comprising a plurality of Buffer Descriptor Address (BDA) entries, wherein a first BDA entry points to a subsequent BDA entry and to a final BDA entry, each of the plurality of BDA entries of the linked list includes one of the data buffer addresses and an associated cell count that indicates the corresponding number of cells contained in the corresponding data buffer;
• retrieve a first address from the queue;
• and
• modify the linked list of addresses of the queue based on the cell count of the first address retrieved, including decrementing the cell count of the first address each time the first address is retrieved.

An apparatus, comprising:

• a first storage device for holding queues;
• a second storage device for holding data packets;
• a memory that stores executable instructions;
• and
• a processor that executes the instructions to:
• store addresses corresponding to a plurality of data buffers having a corresponding number of cells in a queue configured as a linked list comprising a plurality of Buffer Descriptor Address (BDA) entries, wherein a first BDA entry points to a subsequent BDA entry and to a final BDA entry, each of the plurality of BDA entries of the linked list includes one of the data buffer addresses and an associated cell count that indicates the corresponding number of cells contained in the corresponding data buffer;
• retrieve a first address from the queue, and
• modify the linked list of addresses of the queue based on the cell count of the first address retrieved, including decrementing the cell count of the first address each time the first address is retrieved.

A processing system for managing queues comprising:

• a processor;
• a memory to store queues;
• and
• a storage-medium accessible by the processor to store executable instructions, which when accessed by the processor cause the processor to:
• store addresses corresponding to a plurality of data buffers having a corresponding number of cells in a queue configured as a linked list comprising a plurality of Buffer Descriptor Address (BDA) entries, wherein a first BDA entry points to a subsequent BDA entry and to a final BDA entry, each of the plurality of BDA entries of the linked list includes one of the data buffer addresses and an associated cell count that indicates the corresponding number of cells contained in the corresponding data buffer;
• retrieve a first address from the queue;
• and
• modify the linked list of addresses of the queue based on the cell count of the first address retrieved, including decrementing the cell count of the first address each time the first address is retrieved.