Programmable phase shift and duty cycle correction circuit and method

A circuit configured for generating an output signal from a pair of complementary input signals, the circuit comprising:

• a first circuit block coupled for receiving a first one of the pair of complementary input signals, generating a first linearly increasing voltage in response to a rising edge of the first input signal, and transitioning the output signal from logic LOW to logic HIGH once the first linearly increasing voltage exceeds a first adjustable reference voltage set by the first circuit block;
• a second circuit block, substantially identical to the first circuit block, wherein the second circuit block is coupled for receiving a second one of the pair of complementary input signals, generating a second linearly increasing voltage in response to a rising edge the second input signal, and transitioning the output signal from logic HIGH to logic LOW once the second linearly increasing voltage exceeds a second adjustable reference voltage set by the second circuit block;
• and
• wherein at least one of the adjustable reference voltages set by the first and second circuit blocks can be adjusted to alter a duty cycle of the output signal and/or a phase difference between the input and output signals.

A method for generating an output signal from a pair of complementary input signals, the method comprising:

• producing a first linearly increasing voltage signal upon receiving a rising edge of a first one of the pair of complementary input signals;
• generating a logic HIGH output signal once the first linearly increasing voltage signal exceeds a first adjustable reference voltage;
• producing a second linearly increasing voltage signal upon receiving a rising edge of a second one of the pair of complementary input signals;
• generating a logic LOW output signal once the second linearly increasing voltage signal exceeds a second adjustable reference voltage;
• and
• setting the first and second adjustable reference voltages to control a duty cycle and phase shift amount associated with the output signal.