Device package and method for the fabrication and testing thereof
AssigneeRohm and Haas Electronic Materials LLC
InventorsDavid W. Sherrer, Larry J. Rasnake, John J. Fisher
Life of this patent
Estimating the term…
Loading patent…
AssigneeRohm and Haas Electronic Materials LLC
InventorsDavid W. Sherrer, Larry J. Rasnake, John J. Fisher
Estimating the term…
Provided are methods of forming sealed via structures. One method involves: (a) providing a semiconductor substrate having a first surface and a second surface opposite the first surface; (b) forming a layer on the first surface of the substrate; (c) etching a via hole through the substrate from the second surface to the layer, the via hole having a first perimeter at the first surface; (d) forming an aperture in the layer, wherein the aperture has a second perimeter within the first perimeter; and (e) providing a conductive structure for sealing the via structure. Also provided are sealed via structures, methods of detecting leakage in a sealed device package, sealed device packages, device packages having cooling structures, and methods of bonding a first component to a second component.
A method of forming a sealed via structure, comprising:
A method of forming a sealed via structure, comprising:
Dependencies are inferred from the claim text.