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US 7,127,650 B2Granted
Test method and test device for electronic memories
AssigneeInfineon Technologies AG
InventorsAbel Rios-Baez, Michael Kund
Life of this patent
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Abstract
A test method for electronic memories includes reading out a previously defined test pattern sequentially as a time-dependent signal from the memory, determining the associated spectrum from the time-dependent signal by Fourier transformation, and assessing the memory to be tested using the spectrum. Also included is a suitable test device for the method.
Claims31
A method for testing an electronic memory having memory cells, which comprises:
- selecting a memory area of the memory, the memory area including at least some of the memory cells;
- sequentially reading out a test pattern stored in the memory cells in the selected memory area in a defined order through a common output to present at the common output the test pattern as a time-dependent signal;
- Fourier transforming the time-dependent signal into a spectrum dependent upon the test pattern;
- generating a test result that is dependent on the spectrum;
- and
- carrying out the test-result-generating step to generate a two-alternative test result by:
- forming a difference spectrum from the spectrum and a reference spectrum in a selected frequency range;
- and
- outputting a first of the alternatives for the test result if the following holds true for a predetermined limit value in the selected frequency range:
- |D(f)|≦λ,
- where, D(f) designates the difference spectrum and λ designates the predetermined limit value, and, otherwise, outputting a second of the alternatives for the test result.
8 more elements
A method for testing an electronic memory having memory cells, which comprises:
- selecting a memory area of the memory, the memory area including at least some of the memory cells;
- sequentially reading out a test pattern stored in the memory cells in the selected memory area in a defined order through a common output to present at the common output the test pattern as a time-dependent signal;
- Fourier transforming the time-dependent signal into a spectrum dependent upon the test pattern;
- and
- generating a test result that is dependent on the spectrum;
- carrying out the test-result-generating step to generate a two-alternative test result by:
- forming a difference spectrum from the spectrum and a reference spectrum in & selected frequency range;
- and
- outputting a first of the alternatives for the test result if the following holds true for a predetermined limit value in the selected frequency range:
- ∫
- f1
- f2
-
-
- D
-
- (
- f
- )
-
-
-
- ⅆ
- f
- ≤
- λ
- ,
- where, D(f) designates the difference spectrum, λ designates the predetermined limit value, f1 designates a lower and f2 an upper limit of the selected frequency range, and, otherwise, outputting a second of the alternatives for the test result.
25 more elements
A method for testing an electronic memory having memory cells, which comprises:
- selecting a memory area of the memory, the memory area including at least some of the memory cells;
- sequentially reading out a test pattern stored in the memory cells in the selected memory area in a defined order through a common output to present at the common output the test pattern as a time-dependent signal;
- Fourier transforming the time-dependent signal into a spectrum dependent upon the test pattern;
- and
- generating a test result that is dependent on the spectrum;
- carrying out the test-result-generating step to generate a two-alternative test result by:
- filtering the spectrum with a filter function;
- and
- outputting a first of the alternatives for the test result if the following holds true for a predetermined limit value in a selected frequency range:
- |X(f)·F(f)|≦λ,
- where, X(f) designates the spectrum, λ designates the predetermined limit value, and F(f) designates the filter function, and, otherwise, outputting a second of the alternatives for the test result.
8 more elements
A method for testing an electronic memory having memory cells, which comprises:
- selecting a memory area of the memory, the memory area including at least some of the memory cells;
- sequentially reading out a test pattern stored in the memory cells in the selected memory area in a defined order through a common output to present at the common output the test pattern as a time-dependent signal;
- Fourier transforming the time-dependent signal into a spectrum dependent upon the test pattern;
- and
- generating a test result that is dependent on the spectrum;
- carrying out the test-result-generating step to generate a two-alternative test result by:
- filtering the spectrum with a filter function;
- and
- outputting a first of the alternatives for the test result if the following holds true for a predetermined limit value in a selected frequency range:
- ∫
- f1
- f2
-
-
- X
-
- (
- f
- )
- ·
- F
-
- (
- f
- )
-
-
-
- ⅆ
- f
- ≤
- λ
- ,
- where, X(f) designates the spectrum, λ designates the predetermined limit value, F(f) designates the filter function, f1 designates a lower and f2 an uppar limit of the selected frequency range, and, otherwise, outputting a second of the alternatives for the test result.
31 more elements
A test device for testing an electronic memory having memory cells defining memory areas, the memory cells in at least a selected memory area storing a test pattern, comprising:
- an evaluation unit including the memory cells having the test pattern;
- at least one Fourier transformation unit connected to said evaluation unit such that the test pattern is sent as a time-dependent signal to said Fourier transformation unit in a predetermined order with respect to time, said at least one Fourier transformation unit generating a spectrum dependent on the test pattern from the time-dependent signal and transferring the spectrum to said evaluation unit, said evaluation unit generating the test pattern dependent upon the spectrum.
A semiconductor chip, comprising:
- a semiconductor memory having memory cells defining memory areas ;
- and
- at least one semiconductor chip connected to said semiconductor memory, said at least one semiconductor chip having an at least partly integrated test device for testing said memory, said test device having:
- a read out device sequentially reading out content of said memory cells in at least one of said memory areas in a defined order and outputting the read out content as a time-dependent signal;
- at least one Fourier transformation unit connected to said read out device, said at least one Fourier transformation unit:
- adapted to receive said time-dependent signal in a predetermined order with respect to time;
- and
- adapted to Fourier transform the time-dependent signal into a spectrum and output said spectrum;
- and
- an evaluation unit connected to said at least one Fourier transformation unit, said evaluation unit adapted to receive said spectrum and generate a test result dependent upon said spectrum.
7 more elements
Dependencies are inferred from the claim text.