Method and apparatus for fixing bit errors encountered during cache references without blocking
AssigneeSun Microsystems, Inc.
InventorsMarc Tremblay, Shailender Chaudhry
Life of this patent
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AssigneeSun Microsystems, Inc.
InventorsMarc Tremblay, Shailender Chaudhry
Estimating the term…
One embodiment of the present invention provides a system that fixes bit errors encountered during references to a cache memory. During execution of an application, the system performs a reference to the cache memory by retrieving a data item and an associated error-correcting code from the cache memory. Next, the system computes an error-correcting code from the retrieved data item and compares the computed error-correcting code with the associated error-correcting code. If the computed error-correcting code does not match the associated error-correcting code a bit error has occurred. In this case, the system stores an identifier for the reference in a register within a set of one or more registers associated with the cache memory, so that the bit error can be fixed at a later time. The system also allows the application to continue executing.
A method for fixing bit errors encountered during references to a cache memory, comprising:
An apparatus that fixes bit errors encountered during references to a cache memory, comprising:
An apparatus that fixes bit errors encountered during references to a cache memory, comprising:
Dependencies are inferred from the claim text.