Accumulator controlled prescaler in a phased locked loop
AssigneeAdvanced Micro Devices, Inc.
InventorsRolf Jaehne, Wolfram Kluge, Thorsten Riedel
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AssigneeAdvanced Micro Devices, Inc.
InventorsRolf Jaehne, Wolfram Kluge, Thorsten Riedel
Estimating the term…
A wireless local area network transceiver, an integrated circuit chip, a PLL (Phase Locked Loop) device and a method are provided that may reduce influences of switching noise. The frequency of an output signal of the PLL device is divided in a prescaler of the PLL device by a prescaler factor. The prescaler is operable in at least two modes with each mode having assigned a different prescaler factor. An accumulator is implemented in the PLL circuit for generating a mode switching signal for changing the mode of the prescaler. The generation of the mode switching signal is done by storing an accumulator value and processing a modulus function for updating the accumulator value. The provided technique may allow for reducing disturbances caused by switching the mode of the prescaler in the PLL circuit.
A phase locked loop device comprising:
An integrated circuit chip having a phase locked loop circuit, comprising:
A transceiver in a WLAN (Wireless Local Area Network) communication system, the transceiver having a phase locked loop device comprising:
A method of operating a phase locked loop device, the method comprising:
Dependencies are inferred from the claim text.