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US 7,127,018 B2Granted
Apparatus for and method of measuring clock skew
AssigneeAdvantest Corporation
InventorsTakahiro Yamaguchi, Masahiro Ishida, Mani Soma
Life of this patent
Estimating the term…
Abstract
Timing jitter sequences Δφj[n] and Δφk[n] of respective clock signals under measurement xj(t) and xk(t) are estimated, and a timing difference sequence between those timing jitter sequences is calculated. In addition, initial phase angles φ0j and φ0k of linear instantaneous phases of the xj(t) and xk(t) are estimated, respectively. A sum of a difference between those initial angles and the timing difference sequence is calculated to obtain a clock skew sequence between the xj(t) and xk(t).
Claims47
An apparatus for measuring a clock skew between a plurality of clock signals under measurement comprising:
- a timing jitter estimator to which the plurality of clock signals under measurement are inputted for estimating their respective timing jitter sequences;
- a clock skew estimator to which the plurality of timing jitter sequences are inputted for calculating a timing difference sequence between those timing jitter sequences to output a clock skew sequence;
- and
- a second clock skew estimator to which a plurality of the clock skew sequences are inputted for obtaining a difference between the plurality of clock skew sequences.
1 more element
An apparatus for measuring a clock skew between a plurality of clock signals under measurement comprising:
- a timing jitter estimator to which the plurality of clock signals under measurement are inputted for estimating their respective timing jitter sequences;
- a clock skew estimator to which the plurality of timing jitter sequences are inputted for calculating a timing difference sequence between those timing jitter sequences to output a clock skew sequence;
- and
- a frequency multiplier to which the timing jitter sequence is inputted for multiplying a frequency of the timing jitter sequence to output the frequency-multiplied timing jitter sequence to said clock skew estimator.
1 more element
An apparatus for measuring a clock skew between a plurality of clock signals under measurement comprising:
- a timing jitter estimator to which the plurality of clock signals under measurement are inputted for estimating their respective timing jitter sequences;
- a clock skew estimator to which the plurality of timing jitter sequences are inputted for calculating a timing difference sequence between those timing jitter sequences to output a clock skew sequence;
- and
- a deterministic clock skew estimator for estimating a timing error between ideal clock edges of the plurality of clock signals under measurement to output a deterministic component of clock skew to said clock skew estimator,
- wherein said clock skew estimator is an estimator for adding the deterministic component of clock skew to the timing difference sequence to output the summed value as the clock skew sequence.
2 more elements
A method of measuring a clock skew between a plurality of clock signals under measurement comprising:
- a step of estimating timing jitter sequences of the respective clock signals under measurement;
- a step of calculating a timing difference sequence between the plurality of timing jitter sequences to estimate a clock skew sequence;
- and
- a step of obtaining a difference between the plurality of clock skew sequences to estimate a clock skew sequence.
1 more element
A method of measuring a clock skew between a plurality of clock signals under measurement comprising:
- a step of estimating timing jitter sequences of the respective clock signals under measurement;
- a step of calculating a timing difference sequence between the plurality of timing jitter sequences to estimate a clock skew sequence;
- and
- a step of assigning each timing jitter of the timing jitter sequence M times to estimate a timing jitter sequence that is created by multiplying a frequency of the corresponding clock signal under measurement by (M+1).
1 more element
The method of measuring a clock skew between a plurality of clock signals under measurement comprising:
- a step of estimating timing jitter sequences of the respective clock signals under measurement;
- a step of calculating a timing difference sequence between the plurality of timing jitter sequences to estimate a clock skew sequence;
- and
- a step of estimating a timing error between ideal clock edges of the plurality of clock signals under measurement to estimate a deterministic component of clock skew,
- wherein said step of calculating a timing difference sequence is a step of adding the deterministic component of clock skew to the timing difference sequence to obtain the summed value as the clock skew sequence.
2 more elements
An apparatus far measuring a clock skew between a plurality of clock signals under measurement comprising:
- a timing jitter estimator to which the plurality of clock signals under measurement are inputted for estimating their respective timing jitter sequences;
- a clock skew estimator to which the plurality of timing jitter sequences are inputted for calculating a timing difference sequence between those timing jitter sequences to output a clock skew sequence;
- and
- a clock skew detector to which the clock skew sequence is inputted for obtaining clock skew values of the clock signals under measurment from the clock skew sequence, wherein said clock skew detector comprises one or a plurality of a peak-to-peak detector for obtaining a difference between the maximum value and the minimum value of the clock skew sequence, an RMS detector for obtaining a root-mean-square value of the clock skew sequence, and a histogram estimator for obtaining a histogram of the clock skew sequence.
1 more element
An apparatus for measuring a clock skew between a plurality of clock signals under measurement comprising:
- a timing jitter estimator to which the plurality of clock signals under measurement are inputted for estimating their respective timing jitter sequences, wherein the timing jitter estimator comprises:
- an analytic signal transformer for transforming a clock signal under measurement into a complex analytic signal;
- an instantaneous phase estimator for obtaining an instantaneous phase of the analytic signal;
- a continuous phase converter for converting the instantaneous phase into a continuous instantaneous phase;
- a linear phase estimator for estimating, from the continuous instantaneous phase, its linear instantaneous phase;
- a subtractor far removing the linear instantaneous phase from the continuous instantaneous phase to obtain an instantaneous phase noise;
- and
- a zero-crossing sampler for sampling its input at timings close to zero-crossing timings of a real part of the analytic signal to output the sampled signal, said zero-crossing sampler being inserted in series to any one of connection points between said instantaneous phase estimator and said continuous phase converter, between said continuous phase converter and said linear phase estimator/subtractor, and at an output side of said subtractor,
- wherein a timing jitter sequence of the clock signal under measurement is outputted as an output of said timing jitter estimator;
- and
- a clock skew estimator to which the plurality of timing jitter sequences are inputted for calculating a timing difference sequence between those timing jitter sequences to output a clock skew sequence.
8 more elements
A method of measuring a clock skew between a plurality of clock signals under measurement comprising:
- a step of estimating timing jitter sequences of the respective clock signals under measurement;
- a step of calculating a timing difference sequence between the plurality of timing jitter sequences to estimate a clock skew sequence;
- and
- a step of obtaining clock skew values of the clock signals under measurement from the clock skew sequence, wherein said step of obtaining clock skew values comprises one or a plurality of a step of obtaining a difference between the maximum value and the minimum value of the clock skew sequence to calculate a peak-to-peak value, a step of obtaining a root-mean-square value of the clock skew sequence to calculate an RMS value, and a step of obtaining a histogram data of the clock skew sequence.
1 more element
A method of measuring a clock skew between a plurality of clock signals under measurement comprising:
- a step of estimating timing jitter sequences of the respective clock signals under measurement, wherein the of estimating a timing jitter sequence comprises:
- a step of transforming a clock signal under measurement into a complex analytic signal;
- a step of obtaining an instantaneous phase of the clock signal under measurement from the analytic signal;
- a step of converting the instantaneous phase into a continuous instantaneous phase;
- a step of estimating, from the continuous instantaneous phase, its linear instantaneous phase;
- a step of removing the linear instantaneous phase from the continuous instantaneous phase to obtain an instantaneous phase noise;
- and
- a step of sampling any one of the instantaneous phase, the continuous instantaneous phase, and the phase noise waveform at timings close to zero-crossing timings of a real part of the analytic signal,
- wherein a timing jitter sequence of the clock signal under measurement is eventually obtained;
- and
- a step of calculating a timing difference sequence between the plurality of timing jitter sequences to estimate a clock skew sequence.
8 more elements
Dependencies are inferred from the claim text.