US 7,127,004 B1 · Interleaver and method for interleaving an input data bit sequence using a coded storing of symbol and additional information

An interleaver of a transmitter for interleaving input data bit sequences of M data bits comprising channel encoded code symbols each consisting of a number N data bits and control information associated with every code symbol, to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol;

comprising:
a0) a channel encoder for receiving digital data in the form of packets from a data source and for encoding said digital data into said channel encoded code symbols of said number N of data bits;
a) combining means for combining the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits;
b) control information/code symbol encoding means for encoding said L+N bit control information/code symbol data words into data words of K bits, where K<L+N, according to a predetermined encoding scheme, and
c) an interleaving memory for storing said encoded data words at memory locations thereof.

2 more elements

A method for interleaving in a transmitter input data bit sequence of M data bits comprising channel encoded code symbols each consisting of a number N of data bits together with control information (CI) associated with every code symbol, the control information to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol, comprising the following steps:

a0) a channel encoder for receiving digital data in the form of packets from a data source and for encoding said digital data into said channel encoded code symbols of said number N of data bits;
a) combining the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits;
b) encoding said L+N bit control information/code symbol data words into data words of K bits, where K<L+N, according to a predetermined encoding scheme;
and
c) storing said encoded data words at memory locations of a memory.

2 more elements

An interleaver of a transmitter for interleaving input data bit sequences of M data bits comprising channel encoded code symbols each consisting of a number N of data bits and control information associated with every code symbol, the control information to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol;

comprising:
a0) a channel encoder for receiving digital data in the form of packets from a data source and for encoding said digital data into said channel encoded code symbols of said number N of data bits;
a) combining means for combining the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits,
b) control information/code symbol encoding means for encoding said L+N bit control information/code symbol data words into data words of K bits, where K<L+N, according to a predetermined encoding scheme;
and
c) an interleaving memory for storing said encoded data words at memory locations thereof;
and
a write/read means for writing said encoded data words to an interleaving matrix within said interleaving memory at specific memory locations in a row direction and for reading out said encoded data words from said interleaving matrix in the column direction and a control information/code symbol decoding means for decoding said K bit data words read out from said interleaving matrix in said interleaving memory into said N bit code symbols and said L bit control bits according to an inverse of said predetermined coding scheme, and
said interleaving memory has NW×NR/K memory locations for storing said the K data bits of the encoded data words, wherein NW denotes the number of columns corresponding to the interleaving depth, K denotes the predetermined number of data bits forming one said data word and NR/K denotes the number of rows in said interleaving memory;
and
said write/read means comprises a selection means for building code symbols by selecting N respective data bits from [nW+(n−1)NW+nRNWN·]-th positions of the input data bit sequence, where n=1, 2 . . . N denotes the n-th data bit of the code symbol, nW=0, 1 . . . NW−1 denotes the column address in the interleaving matrix and nR=0, 1 . . . (NR/K)−1 denotes the row address in the interleaving matrix of the data word resulting from a combining encoding of the code symbol and the additional control bits.

8 more elements

An interleaver of a transmitter for interleaving input data bit sequences of M data bits comprising channel encoded code symbols each consisting of a number N of data bits and control information associated with every code symbol, the control information to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol;

comprising:
a) combining means for combining the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits,
b) control information/code symbol encoding means for encoding said L+N bit control information/code symbol data words into data words of K bits, where K<+N, according to a predetermined encoding scheme;
and
c) an interleaving memory for storing said encoded data words at memory locations thereof;
and
a write/read means for writing said encoded data words to an interleaving matrix within said interleaving memory at specific memory locations in a row direction and for reading out said encoded data words from said interleaving matrix in the column direction and a control information/code symbol decoding means for decoding said K bit data words read out from said interleaving matrix in said interleaving memory into said N bit code symbols and said L bit control bits according to an inverse of said predetermined coding scheme, and
said interleaving memory has NW×NR/K memory locations for storing said the K data bits of the encoded data words, wherein NW denotes the number of columns corresponding to the interleaving depth, K denotes the predetermined number of data bits forming one said data word and NR/K denotes the number of rows in said interleaving memory;
and
said write/read means comprises a selection means for building code symbols by selecting N respective data bits from [nW+(n−1)NW+nRNWN·]-th positions of the input data bit sequence, where n=1, 2 . . . N denotes the n-th data bit of the code symbol, nW=0, 1 . . . NW−1 denotes the column address in the interleaving matrix and nR=0, 1 . . . (NR/K)−1 denotes the row address in the interleaving matrix of the data word resulting from a combining encoding of the code symbol and the additional control bits;
and
said selection means selects data bits for said code symbols from said input data bit sequence and provides said selected code symbol data bits to said combining means and comprises for N=2 data bits per code symbol and even NW:
two shift register banks each consisting of a first and a second shift register of length NW, wherein the even and odd numbered data bits of said input data bit sequence are respectively stored in said first registers of said first and second shift register bank;
select/write means for selecting at each write cycle 2 data bits of the least significant bit position and the NW/2 position from the first registers alternately from the first and second register bank and for providing said 2 selected bits as one code symbol to said combining means to be combined with said respective control bits;
shift means for shifting the register which was read at the last write cycle and the second registers of the register banks while reading in the next odd and even bits of a next input data bit sequence to the respective second register of each register bank;
and
wherein after NW alternate data bit selecting and shifting cycles the function of the registers is reversed.

14 more elements

An interleaver of a transmitter for interleaving input data bit sequences of M data bits comprising channel encoded code symbols each consisting of a number N of data bits and control information associated with every code symbol, the control information to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol;

comprising:
a) combining means for combining the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits,
b) control information/code symbol encoding means for encoding said L+N bit control information/code symbol data words into data words of K bits, where K<L+N, according to a predetermined encoding scheme;
and
c) an interleaving memory for storing said encoded data words at memory locations thereof;
and
a write/read means for writing said encoded data words to an interleaving matrix within said interleaving memory at specific memory locations in a row direction and for reading out said encoded data words from said interleaving matrix in the column direction and a control information/code symbol decoding means for decoding said K bit data words read out from said interleaving matrix in said interleaving memory into said N bit code symbols and said L bit control bits according to an inverse of said predetermined coding scheme, and
said interleaving memory has NW×NR/K memory locations for storing said the K data bits of the encoded data words, wherein NW denotes the number of columns corresponding to the interleaving depth, K denotes the predetermined number of data bits forming one said data word and NR/K denotes the number of rows in said interleaving memory;
and
said write/read means comprises a selection means for building code symbols by selecting N respective data bits from [nW+(n−1)NW+nRNWN·]-th positions of the input data bit sequence, where n=1, 2 . . . N denotes the n-th data bit of the code symbol, nW=0, 1 . . . NW−1 denotes the column address in the interleaving matrix and nR=0, 1 . . . (NR/K)−1 denotes the row address in the interleaving matrix of the data word resulting from a combining encoding of the code symbol and the additional control bits;
and
said selection means selects data bits for said code symbols from said input data bit sequence and provides said selected code symbol data bits to said combining means and comprises for N=2 data bits per code symbol and even NW:
two shift register banks each consisting of a first and a second shift register of length NW, wherein the even and odd numbered data bits of said input data bit sequence are respectively stored in said first registers of said first and second shift register bank;
select/write means for selecting at each write cycle 2 data bits alternatively either from the least significant bit position of the first register of the first bank and from the central position ((NW−1)/2) of the first register of the second bank or from the central position of the first register of the first bank and the least significant bit position of the first register of the second bank, and for writing said 2 selected bits as one code symbol to a respective memory position in said interleaving memory;
shift means for shifting the two registers which were read at the last write cycle and the registers of the register banks which were not read, while reading in the next odd and even bits of a next input data bit sequence to the respective second register of each register bank;
and
wherein after NW alternate data bit selecting and shifting cycles the function of the registers is reversed.

14 more elements

An interleaver of a transmitter for interleaving input data bit sequences of M data bits comprising channel encoded code symbols each consisting of a number N data bits and control information associated with every code symbol, the control information to be used to control processing in said transmitter and consisting of a number L of control bits indicating specific states for each corresponding code symbol;

comprising:
a channel encoder for receiving digital data in the form of packets from a data source and for encoding said digital data into said channel encoded code symbols of said number N of data bits
a combiner which combines the respective N data bits of each channel encoded code symbol with the associated L control bits into a control information/code symbol data word of L+N bits;
an encoder which encodes said L+N bit control information/code symbol data words into data words of K bits, where K<L+N, according to a predetermined encoding scheme;
an interleaving memory for storing said encoded data words at memory locations thereof;
and
a decoder which derives the control information from the data words;
a radio frequency transmitter element whose operation is controlled by the control information derived from the decoder.

5 more elements

Interleaver and method for interleaving an input data bit sequence using a coded storing of symbol and additional information

Life of this patent

Interleaver and method for interleaving an input data bit sequence using a coded storing of symbol and additional information

Life of this patent

Abstract

Claims34