Programmable control of leakage current
AssigneeIntel Corporation
InventorsRichard K. Hose, Jr., Shigeki Shimomura
Life of this patent
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Abstract
An apparatus having a memory cell, a ground control circuitry coupled to the memory cell to programmably control a voltage at a first ground, a first circuitry coupled to the memory cell to provide a first voltage to the memory cell during a first period, and a second circuitry coupled to the memory cell to provide a second voltage to memory cell during a second period, is described. In various embodiments, the first voltage is reference to the first ground; and the second voltage is referenced to a second ground which is different from the first ground.
Claims14
An apparatus comprising:
- a memory cell;
- ground control circuitry coupled to the memory cell to programmably control a voltage at a first ground;
- switch circuitry coupled to the memory cell to provide a first voltage to the memory cell during a first period, the first voltage referenced to the first ground;
- and to provide a second voltage to memory cell during a second period, the second voltage referenced to a second ground different from the first ground.
An apparatus comprising:
- a memory cell coupled to a supply voltage;
- and
- a ground control circuitry coupled to the memory cell to programmably control a voltage at a ground, the ground control circuitry including a plurality of MOSFET devices that are binary weighted transistors.
An apparatus comprising:
- a memory cell coupled to a supply voltage;
- and
- a ground control circuitry to programmably control a voltage at a ground coupled to the memory cell, the ground control circuitry including a plurality of MOSFET devices that are binary weighted transistors.
Dependencies are inferred from the claim text.