Non-volatile memory with a single transistor and resistive memory element
AssigneeUnity Semiconductor Corporation
InventorsDarrell Rinerson, Christophe Chevallier
Life of this patent
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Abstract
Non-volatile memory cell with a single semiconductor device per memory cell. The present invention generally allows for a plurality of memory cells to be formed on a semiconductor substrate that supports a semiconductor device. A multi-resistive state material layer that changes its resistive state between a low resistive state and a high resistive state upon application of a voltage pulse is formed above the substrate, generally at a very high temperature. While the layers fabricated between the substrate and the multi-resistive state material use materials that can withstand high temperature processing, the layers fabricated above the multi-resistive state material do not need to withstand high temperature processing.
Claims17
A non-volatile RAM memory array comprising:
- a plurality of memory cells formed on a semiconductor substrate, each cell capable of being selected through a select line and a data line, whereby the select line and the data line are perpendicular to each other, and having
- a single transistor that controls current flow through the memory cell depending on a voltage applied to the select line;
- a memory element including a perovskite that
- changes its resistive state from a high resistive state to a low resistive state upon application of a first voltage pulse across the memory element;
- changes its resistive state from the low resistive state to the high resistive state upon application of a second voltage pulse across the memory element, the second voltage pulse across the memory element being of opposite polarity to the first voltage pulse;
- and
- maintains the resistive state even if power ceases to be supplied to the memory cell;
- wherein the resistive state of the memory cell determines the information stored in the memory cell.
A non-volatile RAM memory array, comprising:
- a plurality of memory cells formed on a semiconductor substrate, each cell capable of being selected through a select line and a data line, and having
- a single semiconductor device that is formed on the semiconductor substrate and controls current flow depending on a voltage applied to the select line;
- and
- a memory element including a perovskite that changes its resistive state between a low resistive state and a high resistive state upon application of a voltage pulse, wherein the resistive state of the memory cell determines the information stored in the memory cell;
- and
- wherein the information stored in the plurality of memory cells can be maintained in the absence of power.
A non-volatile RAM memory array comprising:
- a plurality of memory cells formed on a semiconductor substrate, the semiconductor substrate including a single semiconductor device that controls current flow;
- a first electrode layer;
- a memory element including a perovskite formed on the first electrode that
- changes its resistive state from a high resistive state to a low resistive state upon application of a first voltage pulse across the memory element;
- changes its resistive state from the low resistive state to the high resistive state upon application of a second voltage pulse across the memory element, the second voltage pulse across the memory element being of opposite polarity to the first voltage pulse;
- and
- maintains the resistive state even if power ceases to be supplied to the memory cell;
- and
- a second electrode layer formed on the memory element;
- wherein the resistive state of the memory cell determines the information stored in the memory cell.
Dependencies are inferred from the claim text.