Graphics memory system that utilizes detached-Z buffering in conjunction with a batching architecture to reduce paging overhead

Abstract

A graphics memory system of a graphics display system which utilizes a batching architecture in conjunction with detached Z buffering to minimize paging overhead is disclosed. The graphics memory system comprises a memory controller, which receives a batch of pixels from the graphics display system when a 3D rendering mode is in effect. Each pixel has a color and a corresponding Z coordinate. The memory controller performs a Z comparison test wherein Z coordinates of the batch are compared with existing Z coordinates read from a frame buffer to determine whether each new color of the batch associated with the compared Z coordinate should be written into the frame buffer. If the results of a Z comparison test pass, the new pixel color and Z coordinate are queued for writing into the frame buffer. A preferred embodiment of the graphics memory system uses two memory controllers, with each memory controller accessing its own frame buffer. Each frame buffer may be a RAM storage device. Each memory controller processes a portion of the batch with the image or color portion of a particular pixel processed in one memory controller associated with the Z coordinate of the same pixel is processed in the other memory controller. This allows the memory controllers to access their respective frame buffer memories independently, thus maximizing utilization of the memory bus.

Dependencies are inferred from the claim text.