Micropower logarithmic analog to digital conversion system and method with offset and temperature compensation
AssigneeMassachusetts Institute of Technology
InventorsJi-Jon Sit, Rahul Sarpeshkar
Life of this patent
Estimating the term…
Loading patent…
AssigneeMassachusetts Institute of Technology
InventorsJi-Jon Sit, Rahul Sarpeshkar
Estimating the term…
A logarithmic analog-to-digital converter system is disclosed. The system includes a transconductor for receiving an input signal and for producing a transconductor output signal at a transconductor output, a logarithmic circuit unit that is coupled to an input of the transconductor, a comparator amplifier for receiving the transconductor output signal and for producing a comparator amplifier output signal at a comparator amplifier output, and an integrating capacitor coupled to the transconductor output signal.
A logarithmic analog-to-digital converter system comprising:
A method of providing a logarithmic analog-to-digital conversion, said method comprising the steps of:
A logarithmic analog-to-digital converter system comprising:
A logarithmic analog-to-digital converter system comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Term ended 2 Jul 2024 (estimated)
The invention generally relates to systems and methods for providing logarithmic analog-to-digital conversion, and relates in particular to circuits for providing logarithmic analog-to-digital conversion for auditory enhancement.
Cochlear implants (or bionic ears) have been implanted in tens of thousands of people worldwide. Cochlear implants use a surgically implanted array of electrodes to stimulate the auditory nerve, which restores a measure of hearing to the deaf. The cochlear implant functions as a surrogate middle and inner ear, performing the same chain of signal transduction from sound waves to electrical impulses as in the biological cochlea. FIG. 1 shows the signal-processing chain of a typical cochlear implant that includes a preamplifier 10 that receives an input signal via a microphone 12. The preamplifier 10 provides an amplifier output signal to a plurality of band pass filters 14a–14c. The outputs of the band pass filters 14a–14c are provided to a plurality of envelope detectors 16a–16c respectively, and the outputs of the envelope detectors 16a–16c are provided to a plurality of logarithmic map units 18a–18c respectively. The outputs of the logarithmic map units 18a–18c are provided to a plurality of electrodes 20a–20c respectively as shown. During operation, each band pass filter 14a–14c passes a different band (e.g., low, mid, high). The envelope detectors are used to identify envelope information, and the logarithmic map units are used to provide logarithmic compression of the signal, which is conventionally employed just prior to nervous stimulation. Such compression is useful because theory and experiments suggest that acoustic amplitudes are log-compressed into electrical amplitudes by the cochlea. In other words, there is believed to be a linear relationship between sound intensity in dB sound pressure level (SPL) and electrical stimulation intensity in μA. A circuit that performs logarithmic compression, therefore, is useful in cochlear implant processors.
Logarithmic compression is also inherent to cepstral speech recognition, since a logarithmic function allows the excitation signal in speech to be subtracted from the effect of filtering by the vocal tract. Many speech-recognition front-ends are therefore designed to produce output bits that represent log-spectral magnitudes of a microphone input signal. A logarithmic A/D logarithmically compresses the current input from an envelope detector into a digital output code. Consequently, a low-power logarithmic A/D is very useful in portable speech-recognition front-ends and bionic ears.
The following description may be further understood with reference to the accompanying drawings in which:
FIG. 1 shows an illustrative diagrammatic schematic view of a signal processing system for a cochlear implant of the prior art;
FIG. 2 shows an illustrative diagrammatic schematic view of a circuit implementation of a temperature compensation circuit used in a global feedback system in accordance with an embodiment of the invention;
The drawings are shown for illustrative purposes only.
The invention provides a micropower logarithmic A/D with offset and temperature compensation in accordance with various embodiments. Logarithmic circuits are useful in many applications that require nonlinear signal compression, such as in speech recognition front-ends and cochlear implants. In accordance with certain embodiments, a logarithmic current-input A/D converter with temperature compensation and automatic offset calibration is provided that employs a diode to compute the logarithm, a wide linear range transconductor to perform voltage-to-current conversion, and a dual-slope, auto-zeroing topology with 60 dB of dynamic range for sampling the envelope of speech signals. The temperature dependence of the logarithm inherent in a diode implementation is automatically cancelled in certain embodiments. Experimental results from a 1.5 μm, 3V BiCMOS process show that the converter achieves a temperature stability lower than 150 ppm/° C. from 12° C. to 42° C., and consumes only 3 μW of power when sampling at 300 Hz. At this level of power consumption, the design is thermal-noise limited to 8 bits of precision. This level of precision is adequate for deaf patients and for speech recognition front-ends. The power consumption is almost two orders of magnitude lower than state-of-the-art DSP implementations, and the use of a local feedback topology achieves a 2½-bit improvement over conventional dual-slope designs.
It is also desirable that the logmap have an input dynamic range of at least 60 dB, to handle the range within which most of normal speech will lie. This also allows the logmap to accommodate the internal dynamic range (IDR) of typical cochlear implants, which is around 60 dB, as denoted in FIG. 1. The IDR of a cochlear implant must be fit onto the limited electrical dynamic range (EDR) of a deaf patient's auditory nerve fibers, which may range from 10 dB–20 dB. The threshold of sensation however, may vary by an additional 40 dB between patients or even between electrodes (for example, the minimum detectable electrode current may vary from 2 μA to 200 μA). The absolute level of output current therefore, may have to vary by as much as 60 dB, which is impractical to generate directly from sub-threshold analog currents. Current cochlear implants already make use of a D/A to construct stimulation waveforms in the electrodes. It is desirable therefore, for a fully analog cochlear implant processor to generate output bits that can interface to a back-end D/A stimulator. The D/A stimulator may then be programmed to perform the requisite offset and scaling for each electrode.