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US 7,126,227 B2Granted
Wiring substrate, semiconductor device, semiconductor module, electronic equipment, method for designing wiring substrate, method for manufacturing semiconductor device, and method for manufacturing semiconductor module
AssigneeSeiko Epson Corporation
InventorKoji Yamaguchi
Life of this patent
Estimating the term…
Abstract
The invention can provide an improvement in the connection reliability in mounting semiconductor chips. The invention can include solder balls that are disposed on a back surface of an interposer substrate, in a manner to avoid diagonal lines of the interposer substrate, and a semiconductor chip is mounted on a surface of the interposer substrate. The invention permits electronic devices to be made that are smaller and lighter, while improving their reliability.
Claims13
A wiring substrate, comprising:
- a wiring layer formed on a substrate;
- and
- terminal electrodes that are coupled to the wiring layer and disposed on the substrate in a manner to avoid diagonal lines thereof.
A wiring substrate, comprising:
- a wiring layer formed on a substrate;
- terminal electrodes that are coupled to the wiring layer and disposed on the substrate;
- and
- stress insulation sections provided along diagonal lines of the substrate.
1 more element
A wiring substrate, comprising:
- a wiring layer formed on a substrate;
- terminal electrodes that are coupled to the wiring layer and disposed on the substrate;
- and
- dummy terminals that are provided in four corners or on diagonal lines of the substrate.
1 more element
A semiconductor device, comprising:
- a semiconductor chip having an active region and pad electrodes formed thereon;
- a stress buffer layer formed on the active region;
- bump electrodes that are formed on the stress buffer layer and disposed based on a stress distribution that works on the semiconductor chip;
- rearrangement wiring layers that couple the bump electrodes and the pad electrodes;
- and
- a protection layer that is formed over the rearrangement wiring layers and the pad electrodes.
3 more elements
A semiconductor device, comprising:
- a semiconductor chip having an active region and pad electrodes formed thereon;
- a stress buffer layer formed on the active region;
- bump electrodes that are formed on the stress buffer layer and disposed in a manner to avoid diagonal lines thereof;
- rearrangement wiring layers that couple the bump electrodes and the pad electrodes;
- and
- a protection layer that is formed over the rearrangement wiring layers and the pad electrodes.
3 more elements
A semiconductor device, comprising:
- a semiconductor chip having an active region and pad electrodes formed thereon;
- stress buffer layers that are formed on the active region, and divided and disposed along diagonal lines;
- bump electrodes formed on the stress buffer layers;
- rearrangement wiring layers that couple the bump electrodes and the pad electrodes;
- and
- protection layers that are formed over the rearrangement wiring layers and the pad electrodes, and divided and disposed along the diagonal lines.
3 more elements
A semiconductor device, comprising:
- a semiconductor chip having an active region and pad electrodes formed thereon;
- a stress buffer layer that is formed on the active region;
- bump electrodes formed on the stress buffer layer;
- dummy bumps provided in four corners or on diagonal lines of the stress buffer layer;
- rearrangement wiring layers that couple the bump electrodes and the pad electrodes;
- and
- a protection layer that is formed over the rearrangement wiring layers and the pad electrodes.
4 more elements
A semiconductor module, comprising:
- an interposer substrate having a semiconductor chip surface-mounted thereon;
- a wiring layer provided on a back surface of the interposer substrate;
- bump electrodes that are coupled to the wiring layer and disposed based on a stress distribution that works on the interposer substrate;
- and
- through hole wirings that are provided in the interposer substrate and couple the semiconductor chip and the wiring layer.
2 more elements
A semiconductor module, comprising:
- an interposer substrate having a semiconductor chip surface-mounted thereon;
- a wiring layer provided on a back surface of the interposer substrate;
- bump electrodes that are coupled to the wiring layer and disposed on the back surface of the interposer substrate in a manner to avoid diagonal lines;
- and
- through hole wirings that are provided in the interposer substrate and couple the semiconductor chip and the wiring layer.
2 more elements
A semiconductor module, comprising:
- an interposer substrate having a semiconductor chip surface-mounted thereon;
- a wiring layer provided on a back surface of the interposer substrate;
- bump electrodes that are coupled to the wiring layer and disposed on the back surface of the interposer substrate in a manner to avoid diagonal lines;
- at least one of grooves and slits provided along diagonal lines of the interposer substrate;
- and
- through hole wirings that are provided in the interposer substrate and couple the semiconductor chip and the wiring layer.
3 more elements
A semiconductor module, comprising:
- an interposer substrate having a semiconductor chip surface-mounted thereon;
- a wiring layer provided on a back surface of the interposer substrate;
- bump electrodes that are coupled to the wiring layer and disposed on the back surface of the interposer substrate;
- dummy bumps provided in four corners or on diagonal lines of the back surface of the interposer substrate;
- and
- through hole wirings that are provided in the interposer substrate and couple the semiconductor chip and the wiring layer.
3 more elements
An electronic device, comprising:
- an interposer substrate having a semiconductor chip surface-mounted thereon;
- a wiring layer provided on a back surface of the interposer substrate;
- bump electrodes that are coupled to the wiring layer and disposed on the back surface of the interposer substrate in a manner to avoid diagonal lines;
- through hole wirings that are provided in the interposer substrate and couple the semiconductor chip and the wiring layer;
- a mother substrate having the interposer substrate mounted thereon;
- and
- an electronic component that is coupled to the bump electrodes through the mother substrate.
4 more elements
Dependencies are inferred from the claim text.