MISFET for reducing leakage current
AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsAkira Inoue, Takeshi Takagi, Akira Asai, Haruyuki Sorada
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AssigneeMatsushita Electric Industrial Co., Ltd.
InventorsAkira Inoue, Takeshi Takagi, Akira Asai, Haruyuki Sorada
Estimating the term…
A MISFET according to this invention includes: a substrate having a semiconductor layer; an active region formed in the semiconductor layer; a gate insulator formed on the active region; a gate formed on the gate insulator; and a source region and a drain region, wherein: the active region is formed, in plan view, to have a body portion and a projecting portion projecting from a periphery of the body portion; the gate is formed, in plan view, to intersect the body portion of the active region, cover a pair of connecting portions connecting a periphery of the projecting portion to the periphery of the body portion and allow a part of the projecting portion to project from a periphery of the gate; and the source region and the drain region are formed in regions of the body portion of the active region which are situated on opposite sides of the gate in plan view, respectively.
A MISFET comprising:
Dependencies are inferred from the claim text.