Advanced copper damascene structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Shi Liu
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorChung-Shi Liu
Estimating the term…
A method of forming round bottom corners for conductive lines in an integrated circuit is presented. Two approaches are taken to achieve a preferred rounding profile. For both approaches, a trench is formed and conductive materials are filled in the trench. The etch stop layer (ESL) approach involves forming an ESL underlying an inter-level dielectric (ILD). After etching a trench in the ILD, the ESL is etched to further round trench corners. The chemistry approach involves changing the etching chemistry when etching the trench. The two approaches can be used separately or combined in the preferred embodiments of the present invention. In a preferred embodiment, a via structure comprising two copper lines and an interconnecting via is formed. By using the ESL and chemistry approaches, the bottom corners are formed substantially round. The preferred embodiment of the present invention is applied to conductive features that are close enough to cause time dependent dielectric breakdown.
A method for forming a via interconnection structure, the method comprising:
A method for forming an integrated circuit structure, the method comprising:
Dependencies are inferred from the claim text.