Data processing apparatus and method for generating the data of an object program for a parallel operation apparatus

A data processing apparatus for generating a Control Data Flow Graph (CDFG), from a source code, of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said data processing apparatus comprising:

• condition storage means for registering, in advance, limiting conditions representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• source input means for entering said source code;
• graph generating means for analyzing the language of said source code entered by said source input means and generating a Data Flow Graph (DFG);
• and
• schedule generating means for generating a CDFG in which operation states sequentially transited in a plurality of stages are scheduled, from the DFG generated by said graph generating means according to said limiting conditions.

A data processing apparatus for generating net lists of circuit resources from a Register Transfer Level (RTL) description of a parallel operation apparatus having a matrix of processing circuits each having a plurality of types of circuit resources for which processing data have different bit numbers, for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said data processing apparatus comprising:

• condition storage means for registering, in advance, limiting conditions representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• description input means for entering the RTL description of said parallel operation apparatus;
• list generating means for generating net lists of the plurality of types of circuit resources from said RTL description entered by said description input means according to said limiting conditions;
• and
• list output means for outputting said net lists generated by said list generating means.

A data processing apparatus for generating object codes in respective contexts in a plurality of sequentially switched cycles from net lists of a matrix circuit of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said data processing apparatus comprising:

• condition storage means for registering, in advance, limiting conditions representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• object storage means for registering, in advance, the object codes of said processing circuits;
• processing layout means for assigning said net lists to said processing circuits of said matrix circuit in the respective contexts in a plurality of cycles according to said limiting conditions;
• code converting means for converting the net lists assigned to said processing circuits by said processing layout means into corresponding object codes;
• and
• object output means for outputting the object codes of said processing circuits which have been converted by said code converting means.

A method of processing data in a data processing apparatus for generating an object code from a source code descriptive of operation of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said object code containing at least contexts composed of said individually established operation instructions for sequentially switched operation cycles of said processing circuits and said interconnection circuits, said method comprising the steps of:

• receiving an entry of said source code;
• detecting operation states in successively transited stages corresponding to said contexts in the sequentially switched operation cycles from said source code according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus, and generating said object code;
• and
• outputting the generated object code.

A method of processing data in a data processing apparatus for generating a Control Data Flow Graph (CDFG), from a source code, of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said method comprising the steps of:

• entering said source code;
• analyzing a language of said source code which is entered and generating a Data Flow Graph (DFG);
• and
• generating a CDFG in which operation states in a plurality of stages are scheduled, from the DFG which has been generated according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus.

A method of processing data in a data processing apparatus for generating net lists of circuit resources from a Register Transfer Level (RTL) description of a parallel operation apparatus having a matrix of processing circuits each having a plurality of types of circuit resources for which processing data have different bit numbers, for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said method comprising the steps of:

• entering the RTL description of said parallel operation apparatus;
• generating net lists of the plurality of types of circuit resources from said RTL description according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• and
• outputting said net lists which have been generated.

A method of processing data in a data processing apparatus for generating object codes in respective contexts in a plurality of sequentially switched cycles from net lists of a matrix circuit of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said method comprising the steps of:

• assigning said net lists to said processing circuits of said matrix circuit in the respective contexts in a plurality of cycles according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• selectively converting the net lists assigned to said processing circuits into various object codes which have been registered in advance;
• and
• outputting the object codes of said processing circuits which have been converted.

A data processing apparatus including a computer program for a data processing apparatus for generating an object code from a source code descriptive of operation of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said object code containing at least contexts composed of said individually established operation instructions for sequentially switched operation cycles of said processing circuits and said interconnection circuits, said computer program enabling said data processing apparatus to carry out a process comprising the steps of:

• receiving an entry of said source code;
• detecting operation states in sequentially transited stages corresponding to said contexts in the sequentially switched operation cycles from said source code according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus, and generating said object code;
• and
• outputting the generated object code.

A data processing apparatus including a computer program for a data processing apparatus for generating a Control Data Flow Graph (CDFG), from a source code, of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said computer program enabling said data processing apparatus to carry out a process comprising the steps of:

• entering said source code;
• analyzing a language of said source code which is entered and generating a Data Flow Graph (DFG);
• and
• generating a CDFG in which operation states in a plurality of stages are scheduled, from the DFG which has been generated according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus.

A data processing apparatus including a computer program for a data processing apparatus for generating net lists of circuit resources from a Register Transfer Level (RTL) description of a parallel operation apparatus having a matrix of processing circuits each having a plurality of types of circuit resources for which processing data have different bit numbers, for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said computer program enabling said data processing apparatus to carry out a process comprising the steps of:

• entering the RTL description of said parallel operation apparatus;
• generating net lists of the plurality of types of circuit resources from said RTL description according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• and
• outputting said net lists which have been generated.

A data processing apparatus including a computer program for a data processing apparatus for generating object codes in respective contexts in a plurality of sequentially switched cycles from net lists of a matrix circuit of a parallel operation apparatus having a matrix of processing circuits for individually carrying out data processing according to individually established operation instructions, and interconnection circuits for individually switching connections between said processing circuits according to individually established operation instructions, said computer program enabling said data processing apparatus to carry out a process comprising the steps of:

• assigning said net lists to said processing circuits of said matrix circuit in the respective contexts in a plurality of cycles according to limiting conditions, registered in advance, representing at least a physical structure and physical characteristics of said parallel operation apparatus;
• selectively converting the net lists assigned to said processing circuits into various object codes which have been registered in advance;
• and
• outputting the object codes of said processing circuits which have been converted.

A data processing system comprising:

• a parallel operation apparatus comprising a matrix circuit having a matrix of processing circuits and interconnection circuits, and a state manager, separate from said matrix circuit, for sequentially switching operation instructions for said matrix circuit sequentially in respective operation cycles;
• and
• a data processing apparatus for generating an object code separately for a data path and a finite-state machine from a source code descriptive of operation of said parallel operation apparatus;
• said matrix circuit corresponding to said data path, and said state manager corresponding to said finite-state machine.