Pass-transistor logic circuit and a method of designing thereof

A CAD system for mapping a logical expression to a logic circuit, the logical expression comprising a first product term and a second product term including n and m logic functions, respectively, wherein m is greater than n, the system comprising:

• means for placing a first multiple-input logic gate having at least n input terminals and an output terminal;
• means for connecting the input terminals of the first multiple-input logic gate to directly input the n logic functions of the first product term so that the first product term is output from the output terminal of the first multiple-input logic gate;
• means for placing a second multiple-input logic gate having less than m input terminals and an output terminal, and a unit multiplexer having a first input terminal, a second input terminal to input a constant, a control terminal and an output terminal;
• means for connecting the first input terminal and the control terminal of the unit multiplexer to input at least two of the m logic functions of the second product term;
• and
• means for connecting the input terminals of the second multiple-input logic gate to input the logic functions of the second product term by inputting the at least two of the m logic functions through the output terminal of the unit multiplexer so that the second product term is output from the output terminal of the second multiple-input logic gate.

A logic circuit for executing a logical operation expressed by a logical expression comprising a first product term and a second product term including n and m logic functions, respectively, wherein m is greater than n, the logic circuit comprising:

• a first multiple-input logic gate having at least n input terminals and an output terminal, wherein the n logic functions of the first product term are input directly to the input terminals of the first multiple-input logic gate to output the first product term from the output terminal of the first multiple-input logic gate;
• a second multiple-input logic gate having less than m input terminals and an output terminal;
• and
• a first unit multiplexer having a first input terminal, a second input terminal to input a constant, a control terminal and an output terminal connected to one of the input terminals of the second multiple-input logic gate,
• wherein the m logic functions of the second product term are input to the input terminals of the second multiple-input logic gate by inputting at least two of the m logic functions through the first input terminal and the control terminal of the first unit multiplexer to output the second product term from the output terminal of the second multiple-input logic gate.

An electronic system including a logic circuit for executing a logical operation expressed by a logical expression comprising a first product term and a second product term including n and m logic functions, respectively, wherein m is greater than n, the logic circuit comprising:

• a first multiple-input logic gate having at least n input terminals and an output terminal, wherein the n logic functions of the first product term are input directly to the input terminals of the first multiple-input logic gate to output the first product term from the output terminal of the first multiple-input logic gate;
• a second multiple-input logic gate having less than m input terminals and an output terminal;
• and
• an unit multiplexer having a first input terminal, a second input terminal to input a constant, a control terminal and an output terminal connected to one of the input terminals of the second multiple-input logic gate,
• wherein the m logic functions of the second product term are input to the input terminals of the second multiple-input logic gate by inputting at least two of the m logic functions through the first input and the control terminal of the unit multiplexer to output the second product term from the output terminal of the second multiple-input logic gate.

A method of executing a logical operation expressed by a logical expression comprising a first product term and a second product term including n and m logic functions, respectively, wherein m is greater than n, the method comprising:

• inputting the n logic functions of the first product term directly to input terminals of a first multiple-input logic gate to output the first product term from an output terminal of the first multiple-input logic gate;
• inputting at least two of the m logic functions of the second product term to a first input terminal and a control terminal of an unit multiplexer having a second input terminal connected to input a constant;
• and
• inputting the m logic functions of the second product term to input terminals of a second multiple-input logic gate by inputting the at least two of the m logic functions through an output terminal of the unit multiplexer to output the second product term from an output terminal of the second multiple-input logic gate.