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US 7,120,889 B2Granted
Integrated circuit schematics and layouts
AssigneeMicron Technology, Inc.
InventorsChristophe Chevallier, Adriana Ababei
Life of this patent
Estimating the term…
Abstract
Integrated circuit schematics and layouts are provided. A schematic for an integrated circuit includes a number of circuit components interconnected by lines and a number of width markers, each assigned a width marker having a minimum width parameter.
Claims13
A schematic for an integrated circuit, comprising:
- a plurality of circuit components interconnected by lines;
- a plurality of width markers, wherein only lines having a width requirement greater than a default minimum line width are assigned a width marker;
- and
- each width marker having a minimum width parameter.
1 more element
A schematic for an integrated circuit, comprising:
- a plurality of circuit components interconnected by lines;
- and
- a line width layer, comprising:
- a plurality of line width markers, a line width marker only for each line having a width greater than a default minimum width;
- and
- a line width parameter for each line width marker.
3 more elements
An integrated circuit layout, comprising:
- a component layer comprising a plurality of circuit components interconnected by lines;
- and
- a line width layer comprising:
- a plurality of line width markers, line wherein only lines having a width greater than an absolute minimum width have a line width marker;
- and
- a line width parameter for each line width marker.
3 more elements
A schematic for an integrated circuit, comprising:
- a plurality of symbols respectively corresponding to circuit components of the integrated circuit, the symbols interconnected by schematic lines respectively corresponding to circuit lines interconnecting the circuit components;
- a plurality of width markers, wherein only schematic lines corresponding to circuit lines having a width requirement greater than a default minimum line width are assigned a width marker;
- and
- each width marker having a width parameter representing a minimum width for the circuit line corresponding to the schematic line for that width marker.
1 more element
A schematic for an integrated circuit, comprising:
- a plurality of symbols respectively corresponding to circuit components of the integrated circuit, the symbols interconnected by schematic lines respectively corresponding to circuit lines interconnecting the circuit components;
- and
- a line width layer, comprising:
- a plurality of line width markers, a line width marker only for each schematic line corresponding a circuit line having a width greater than a default minimum width;
- and
- a line width parameter for each line width marker.
3 more elements
Dependencies are inferred from the claim text.