Data generator for generating test data for word-oriented semiconductor memories
AssigneeInfineon Technologies AG
InventorCarsten Ohlhoff
Life of this patent
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Abstract
A data generator for generating test data for a word-oriented semiconductor memory is integrated on a semiconductor chip of the semiconductor memory. The data generator has a shift register.
Claims9
A testing device for testing a word-oriented semiconductor memory integrated on a chip, the testing device comprising:
- a data generator for generating test data commonly integrated on the semiconductor chip and connected to the semiconductor memory, and said data generator including a shift resister;
- a selection unit connected to said shift register and configured to select, for a generation of a data word having a width of n bits, a subset of n data bits from a content of said shift register containing S data bits, S being greater than n;
- and
- the semiconductor memory being configured for storing data words having a width of n bits, and said shift register having a length of S bits, corresponding to an integer multiple of n, n being an integer greater than zero.
A word-oriented semiconductor memory device on a semiconductor chip, which comprises:
- a word-oriented semiconductor memory integrated on a semiconductor chip;
- a BIST controller integrated on the semiconductor chip and connected to said semiconductor memory and including a data generator for generating test data for testing said semiconductor memory, said data generator including a shift register;
- a selection unit connected to said shift register and configured to select, for a generation of a data word having a width of n bits, a subset of n data bits from a content of said shift register containing S data bits, S being greater than n;
- and
- the semiconductor memory being configured for storing data words having a width of n bits, and said shift register having a length of S bits, corresponding to an integer multiple of n, n being an integer greater than zero.
In a data generator for generating test data for a word-oriented semiconductor memory, the improvement wherein the data generator is commonly integrated with the semiconductor memory on a common semiconductor chip, and wherein the data generator includes a shift register;
- a selection unit connected to said shift register and configured to select, for a generation of a data word having a width of n bits, a subset of n data bits from a content of said shift register containing S data bits, S being greater than n;
- and
- the semiconductor memory being configured for storing data words having a width of n bits, and said shift register having a length of S bits, corresponding to an integer multiple of n, n being an integer greater than zero.
Dependencies are inferred from the claim text.