Failure propagation path estimate system
AssigneeNEC Electronics Corporation
InventorKazuki Shigeta
Life of this patent
Estimating the term…
Loading patent…
AssigneeNEC Electronics Corporation
InventorKazuki Shigeta
Estimating the term…
The present invention provides a technique relating to a failure propagation path estimate system which can realize an estimate process by adding the measurement result to the failure location estimate results estimated prior to the measurement, and which can realize high-speed re-calculation of only part of a large-scale circuit relating to the measurement point. As shown in FIG. 1, the failure propagation path estimate system according to the present embodiment is generally provided with an input device 1 such as a keyboard or an interface for external devices, a failure propagation path estimate processor (failure propagation path estimate device, error propagation path estimate processor) 2 operated under the control of a program, a storage device 4 for storing information necessary for the failure propagation path estimate process, and an output device 5 such as a display device, a printer or an interface for external devices.
A processor-readable medium incorporating a program for instructions that configure a processor to function as a failure propagation path estimate system for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation of logic values based on a failure output terminal in the logic circuit, the system comprising:
A failure propagation path estimate method for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation based on a failure output terminal in the logic circuit, the method comprising:
A storage medium for storing a computer program product to execute a failure propagation path estimate process for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation of logic values based on a failure output terminal in the logic circuit, the process comprising:
A storage medium for storing a computer program product to execute a failure propagation path estimate process for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation of logic values based on a failure output terminal in the logic circuit, where re-calculation is performed, when an initial failure location estimate process has already taken place, to reflect the measurement result on the result obtained from the failure location estimate process, wherein the process comprises:
A storage medium for storing a computer program product to execute a failure propagation path estimate process for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation of logic values based on a failure output terminal in the logic circuit, where re-calculation is performed, when an initial failure location estimate process has already taken place, to reflect the measurement result on the result obtained from the failure location estimate process, wherein, when an actual measurement value of a measured value of a node in the logic circuit is a normal value identical to the expected value, the failure propagation path estimate process further comprises:
A storage medium for storing a computer program product to execute a failure propagation path estimate process for estimating a logic state and a failure propagation path in a logic circuit by repeating an assumption and an implication operation of logic values based on a failure output terminal in the logic circuit, where re-calculation is performed, when an initial failure location estimate process has already taken place, to reflect the measurement result on the result obtained from the failure location estimate process, wherein, when an actual measurement value of a measured value of a node in the logic circuit is an unexpected value that differs from the expected value, the failure propagation path estimate process further comprises:
A storage medium for storing a computer program product capable of executing a failure propagation path estimate method, the method comprising:
Dependencies are inferred from the claim text.