Clock circuitry on plural integrated circuits
AssigneeHewlett-Packard Development Company, L.P.
InventorLi Tsai
Life of this patent
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Abstract
Clock circuitry supplies synchronized clock waves to loads on plural integrated circuit chips. The clock circuitry couples the synchronized clock waves to regions of the chips. There is a first clock wave route in a first direction from a first chip to a second chip and a second clock wave route in a second direction from the second chip to the first chip. The routes have substantially the same geometry and are in close proximity to each other so they have substantially the same effects on clock waves propagating therein in opposite directions. A phase detector and lowpass filter on the first chip responds to (1) a clock wave source and (2) a clock wave derived on a chip other than the first chip, to supply, via a common mode line, a control for voltage controlled delays of the chips other than the third chip.
Claims17
In combination, plural integrated circuit chips, clock circuitry for supplying synchronized clock waves to loads on the plural integrated circuit chips, the clock circuitry being on the chips and adapted to be responsive to a source of clock waves, the clock circuitry being arranged for coupling the synchronized clock waves to regions of the plural chips, first and second routes for the clock waves between pairs of the chips, the first and second routes and the chips being arranged so there is a first clock wave route in a first direction from a first chip of a particular pair to a second chip of that particular pair, and a second clock wave route in a second direction from the second chip of the particular pair to the first chip of the particular pair, the first and second routes having substantially the same geometry and being in close proximity to each other so they have substantially the same effects on clock waves propagating therein in opposite directions, and circuitry for maintaining a substantially constant phase relation between the clock waves transmitted to and from the first chip via the first and second routes.
Dependencies are inferred from the claim text.