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US 7,120,722 B2Granted
Using information provided through tag space
AssigneeIntel Corporation
InventorsDebendra Das Sharma, Sridhar Muthrasanallur, Michael D. Smith
Life of this patent
Estimating the term…
Abstract
In some embodiments, the inventions include a device and bus transaction control circuitry to receive bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the device. Other embodiments are described and claimed.
Claims13
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with tag space, wherein for some of the transactions, a first portion of the tag space is used in uniquely identifying a transaction sequence that includes the transaction with the tag space, and a second portion of the tag space includes information that is used by the device for a purpose other than uniquely identifying a transaction sequence, wherein at least some of the transactions are requests and under some circumstances the device responds to the requests with completions of a first length if a bit in the second portion has a first value and responds with completions of a second length if the bit has a second value.
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with tag space, wherein for some of the transactions, a first portion of the tag space is used in uniquely identifying a transaction sequence that includes the transaction with the tag space, and a second portion of the tag space includes information that is used by the device for a purpose other than uniquely identifying a transaction sequence, wherein at least some of the transactions are prefetch requests and some of the transactions are demand requests, and under some conditions the device allocates resources with a first priority if a bit in the second portion has a first value and allocates resources with a second priority if the bit has a second value.
A chip comprising:
- a device;
- and
- bus transaction control circuitry to receive bus transactions with tag space, wherein for some of the transactions, a first portion of the tag space is used in uniquely identifying a transaction sequence that includes the transaction with the tag space, and a second portion of the tag space includes information that is used by the device for a purpose other than uniquely identifying a transaction sequence, and wherein the information relates to one of the following:
- a state of a remote bus and an event that happened on a remote bus.
1 more element
Dependencies are inferred from the claim text.