Systems and methods for interfacing legacy equipment to high-speed data buses
AssigneeThe Boeing Company
InventorGary A. Kinstler
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AssigneeThe Boeing Company
InventorGary A. Kinstler
Estimating the term…
Various methods and systems provide interfaces between legacy data buses such as MIL-STD 1553 buses and wideband data buses such as IEEE 1394 data buses. One technique for interfacing a legacy device to a wideband data bus includes the broad steps of receiving legacy data in a legacy format from the legacy device, acquiring a timeslot on the high-speed data bus for at least a portion of the legacy data, embedding the portion of the legacy data into the timeslot to thereby transmit the portion of the data on the wideband data bus, repeating the acquiring and embedding steps until all of the received data is transmitted on the wideband data bus. The timeslot may be, for example, an immediate timeslot obtained via an interrupt-type request, or an acknowledge-accelerated arbitration requested timeslot occurring during a recurring access window.
A method of interfacing a legacy device to a wideband data bus, the method comprising the steps of:
A method of transmitting MIL-STD 1553 data over an IEEE 1394 data bus, the method comprising the step of:
A method of transmitting MIL-STD 1553 data over an IEEE 1394 data bus, the method comprising the steps of:
A system for interfacing a legacy device with a high-speed data bus, the system comprising:
A system for interfacing a legacy device with a wideband data bus, the system comprising:
A data processing system providing an interface between a legacy bus and a wideband bus, the system comprising:
A digital storage medium having computer-executable instructions stored thereon, the instructions comprising a processing module configured to communicate with a legacy I/O module and a LINK layer module via an input/output subsystem, wherein the processing module is operable to receive legacy data from a legacy bus via the legacy I/O module, to request a timeslot on a wideband bus for at least a portion of the legacy data via the LINK module, and to transmit the legacy data on the wideband bus using the timeslot to thereby form a bridge between the legacy bus and the wideband bus.
Dependencies are inferred from the claim text.