Readdressable virtual DMA control and status registers

An apparatus comprising:

• a first memory device in which a source data location is allocated having a block of data to be transferred from in a first transfer;
• a second memory device in which a destination data location is allocated for the block of data to be transferred to in a first transfer;
• a controlling device coupled to both the first and second memory devices and capable of executing machine-readable instructions;
• a DMA controller coupled to the controlling device and both the first and second devices, and having a transfer parameters location base address register into which the controlling device writes a value specifying the base address of a first parameters location from which the DMA controller obtains parameters of the first transfer at transfer time.

A method comprising:

• writing a first set of parameters for a transfer of a first block of data to be carried out by a DMA controller to a first transfer parameters location allocated within a memory device, where in the parameters for the transfer of the first block of data are comprised of a base address of a first transfer status location;
• writing the base address of the first transfer parameters location into a register of the DMA controller at transfer time;
• triggering the DMA controller to start to carry out the transfer of the first block of data by accessing the first transfer parameters location to obtain parameters of the transfer of the block of data to be carried out;
• and
• accessing the first transfer status location to determine whether or not the DMA controller has written a value into the first transfer status location indicating that the transfer of the first block of data has been completed.

A machine-accessible medium comprising code that when executed by a processor within an electronic device, causes the electronic device to:

• write a first set of parameters for a transfer of a first block of data to be carried out by a DMA controller to a first transfer parameters location allocated within a memory device, where in the parameters for the transfer of the first block of data are comprised of a base address of a first transfer status location;
• write the base address of the first transfer parameters location into a register of the DMA controller at transfer time;
• trigger the DMA controller to start to carry out the transfer of the first block of data by accessing the first transfer parameters location to obtain parameters of the transfer of the block of data to be carried out;
• and
• access the first transfer status location to determine whether or not the DMA controller has written a value into the first transfer status location indicating that the transfer of the first block of data has been completed.