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US 7,120,083 B2Granted
Structure and method for transferring column address
AssigneeHynix Semiconductor Inc.
InventorBok Rim Ko
Life of this patent
Estimating the term…
Abstract
The present invention relates to a structure and method for transferring a column address. In transferring an external column address to the inside of a memory cell, a latch control unit controls the operation of a latch unit for latching the external column address signal. It is thus possible to prohibit consumption of current by controlling the operation of the latch unit when a read or write command signal is inputted.
Claims11
A structure for transferring a column address comprising:
- an address buffer unit for buffering an external column address;
- a signal generator for generating a clock control signal by converting a clock signal in response to the read/write command signal;
- an output unit for generating a control signal using the clock signal when the signal generator generates the clock control signal of a first level;
- and
- a latch unit for converting the buffered column address into an internal address according to the control signal.
2 more elements
A method for transferring a column address comprising the steps of:
- (a) buffering an external column address;
- (b) outputting a clock signal as a control signal if a read/write command signal is not applied, and outputting the control signal from which the clock signal of one cycle next to the read/write command signal is removed if the read/write command signal is applied;
- and
- (c) converting the buffered column address into an internal address according to the control signal, and latching the internal address.
1 more element
A structure for transferring a column address comprising:
- an address buffer unit for buffering an external column address;
- a latch control unit for outputting a clock signal as a control signal if a read/write command signal is not applied, and outputting the control signal from which the clock signal of one cycle next to the read/write command signal is removed if the read/write command signal is applied;
- and
- a latch unit for converting the buffered column address into an internal address according to the control signal.
1 more element
Dependencies are inferred from the claim text.