Semiconductor memory and method for operating a semiconductor memory
AssigneeInfineon Technologies AG
InventorsManfred Proell, Herbert Benzinger, Manfred Dobler, Joerg Kliewer
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Abstract
A semiconductor memory includes storage cells (2) that have storage capacitors and transistors with an electrode, which is electrically biasable with two different electrical potentials (V1, V2) in order to open and close the transistor. The electrode potential (V2) intended for the off state of the transistor is a temperature-dependent potential, the value of which is controlled temperature-dependently by the semiconductor memory (1) so that the second electrical potential (V2) becomes more different from the first electrical potential (V1) as the temperature (T) increases.
Claims25
A semiconductor memory with a multiplicity of storage cells, each storage cell having a charge storage and a transistor with an electrode;
- the electrode being separated from a channel region of the transistor by a dielectric layer;
- the electrode being electrically biasable with a first electrical potential in order to open the transistor and with a second electrical potential in order to close the transistor;
- the semiconductor memory providing the first electrical potential and the second electrical potential;
- the second electrical potential provided by the semiconductor memory being a temperature-dependent potential, the value of which is controlled by the semiconductor memory in order to reduce leakage currents;
- and
- the second electrical potential being controlled so that it becomes more different from the first electrical potential as the temperature increases.
A method for operating a semiconductor memory with a multiplicity of storage cells, each storage cell having a charge storage and a transistor with an electrode that is separated from a channel region of the transistor by a dielectric layer, the method comprising:
- electrically biasing the electrode with a first electrical potential in order to open the transistor;
- and
- electrically biasing the electrode with a second electrical potential in order to close the transistor;
- wherein the second electrical potential is a temperature-dependent potential, which is controlled so that the difference between the second electrical potential and the first electrical potential increases as the temperature increases.
A semiconductor device comprising:
- a semiconductor substrate;
- an array of dynamic random access memory cells disposed in the semiconductor substrate, each memory cell comprising a storage capacitor coupled in series with an access transistor, the access transistor having a gate electrode coupled to a wordline;
- a temperature sensor disposed in the semiconductor substrate;
- and
- a voltage regulator coupled between the wordline and temperature sensor, the voltage regulator applying a voltage to the gate electrode to turn off the access transistor, the voltage being a function of a temperature measured by the temperature sensor.
Dependencies are inferred from the claim text.