Memory device with programmable parameter controller
AssigneeHynix Semiconductor Inc.
InventorHee Bok Kang
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Abstract
The present invention relates to a memory device having the capability of controlling a characteristic parameter including a register controller including a nonvolatile memory unit for storing data and a parameter controller for outputting a signal corresponding to a predetermined input signal. The parameter controller controls one or more characteristic parameters of the memory unit, including input voltage sensitivity, output signal delay and output signal voltage, according to a signal outputted from the register controller.
Claims10
A memory device capable of controlling a characteristic parameter, comprising:
- a register controller for storing control data;
- and
- a parameter controller for receiving an input signal having a characteristic parameter, for controlling the value of the characteristic parameter of the input signal according to the control data and for generating an output signal having the controlled characteristic parameter, wherein the register controller is nonvolatile, and
- wherein the register controller comprises:
- a register array comprising a plurality of registers for storing the control data;
- and
- a register command processor configured to receive a plurality of signals, to identify a mode by decoding the plurality of signals, and to read/write the control data from/to the plurality of registers according to the identified mode, wherein the plurality of registers are nonvolatile.
An integrated circuit device capable of controlling signal performance characteristics of an input signal to generate an output signal having the controlled signal performance characteristics, comprising:
- a register controller configured to provide a plurality of control signals;
- a plurality of nonvolatile registers each coupled to the register controller to receive one of the plurality of control signals and for storing and outputting a control data signal;
- and
- a plurality of transistors each comprising a source coupled to a voltage source and a gate configured to receive the control data signal from one of the plurality of nonvolatile registers, wherein drains of the plurality of transistors are coupled to provide a common output which is used to control the signal performance characteristics.
Dependencies are inferred from the claim text.