TV decoder
AssigneeSilicon Integrated Systems Corp.
InventorsChien-Hsiu Huang, Hung-Ta Pai
Life of this patent
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Abstract
A TV decoder. The decoder comprises a converter producing a plurality of first bits by sampling a base-band TV signal within a sampling period, and transmitting the first bits in groups, wherein the first bits in each one of the groups undergo parallel transmission through a plurality of first signals, and a demodulator receives the first bits and produces a plurality of second bits controlling the first signals, wherein the second bits are sequentially transmitted through a second signal input to the converter.
Claims6
A demodulator connecting to a N-bits analog-to-digital converter, comprising:
- N
- 2
- data pins receiving data signals from the N-bits analog-to-digital converter;
- a first clock pin receiving a first clock signal from the N-bits analog-to-digital converter;
- a first select pin receiving a first control signal from the N-bits analog-to-digital converter;
- a second select pin receiving a second control signal from the N-bits analog-to-digital converter to select a data signal type with the first control signal;
- a second clock pin transmitting a second clock signal to the N-bits analog-to-digital converter;
- a data select pin transmitting a data control signal to set up the N-bits analog-to-digital converter with the second clock signal;
- a gain control pin transmitting a gain control signal to adjust the dc gain of the N-bits analog-to-digital converter;
- and
- a voltage level control pin transmitting a voltage level control signal to adjust the voltage level of the N-bits analog-to-digital converter.
A method for transmitting signals between an N-bits analog-to-digital converter and a demodulator, comprising:
- providing a N-bits analog-to-digital converter having
- N
- 2
- data signals, a data select signal, a clock signal and a data type select signal;
- providing a demodulator receiving a N bits data from the N-bits analog-to-digital converter, wherein the N bits data comprises a first data and a second data;
- when the clock signal, the data select signal and the data type select signal are at a logic high level, the N-bits analog-to-digital converter transmits the
- N
- 2
- least significant bits of the first data to the demodulator;
- when the clock signal is at a logic low level and the data select signal and the data type select signal are at a logic high level, die N-bits analog-to-digital converter transmits the
- N
- 2
- most significant bits of the first data to the demodulator;
- when the clock signal and the data type select signal are at a logic high level and the data select signal is at a logic low level, the N-bits analog-to-digital converter transmits the
- N
- 2
- least significant bits of the second data to the demodulator;
- and
- when the clock signal and the data select signal are at a logic low level and he data type select signal is at a logic high level, the N-bits analog-to-digital converter transmits the
- N
- 2
- most significant bits of the second data to the demodulator.
Dependencies are inferred from the claim text.