Analog-digital converter optimized for high speed operation

An analog-digital converter converting an input analog signal into a digital value using a plurality of stages, wherein

• a preceding stage amplifies, by a predetermined gain, an analog signal obtained by removal, from an analog signal input to the preceding stage, of an analog signal component corresponding to a digital value derived from analog-to-digital conversion in the preceding stage, and outputs the amplified signal to a subsequent stage,
• said subsequent stage is a feedback stage including a subsequent-stage amplifier circuit which amplifies, by a predetermined gain, a difference between an analog signal input from said preceding stage and an analog signal derived from digital-to-analog conversion from a digital value derived from analog-to-digital conversion in the subsequent stage, and which feeds back the amplified difference to an input of the subsequent stage, and
• the number of bits produced in a single cycle of conversion in said subsequent stage is smaller than the number of bits produced by conversion in said preceding stage.

An analog-digital converter converting an input analog signal into a digital value using a plurality of stages, wherein

• a preceding stage amplifies, by a predetermined gain, an analog signal obtained by removal, from an analog signal input to the preceding stage, of an analog signal component corresponding to a digital value derived from analog-to-digital conversion in the preceding stage, and outputs the amplified signal to a subsequent stage,
• said subsequent stage is a feedback stage including a first subsequent-stage amplifier circuit amplifying an analog signal input from said preceding stage by a first predetermined gain, and a second subsequent-stage amplifier circuit amplifying, by a second predetermined gain, a difference between an analog signal output from said first subsequent-stage amplifier, and an analog signal which is derived from digital-to-analog conversion from a digital value derived from analog-to-digital conversion in the subsequent stage, and which is amplified by a gain practically identical with said first predetermined gain, the second subsequent-stage amplifier circuit feeding back the amplified difference to an input of the subsequent stage, and
• the number of bits produced in a single cycle of conversion in said subsequent stage is smaller than the number of bits produced by conversion in said preceding stage.