Low-power, low-area power headswitch

An electronic circuit comprising:

• a load circuit comprised of at least one field effect transistor (FET) device;
• a headswitch comprised of at least one N-channel FET (N-FET) device and coupled between a power supply and the load circuit, wherein the headswitch is operative to couple the power supply to the load circuit when the headswitch is enabled and to cut off the power supply from the load circuit when the headswitch is disabled;
• a charge pump coupled to the headswitch and operative to provide a control signal for the headswitch;
• an analog-to-digital converter (ADC) coupled to the headswitch;
• a controller coupled to the ADC and the charge pump, wherein the controller, charge pump headswitch, and ADC are coupled in a feedback configuration to implement a digital voltage regulator;
• wherein the ADC is operative to convert a load supply voltage provided by the headswitch to the load circuit into a digital signal, wherein the controller is operative to provide a digital control for the charge pump based on the digital signal from the ADC and a digital target value, and wherein the digital control maintains a load supply provided by the headswitch to the load circuit at a selected voltage;
• and
• wherein the charge pump includes a plurality of stages, and wherein the digital control enables selected ones of the plurality of stages.

An integrated circuit in a wireless communication device, the circuit comprising:

• a load circuit comprised at least one field effect transistor (FET) device;
• a headswitch comprised of at least one N-channel FET (N-FET) device and coupled between a power supply and the load circuit, wherein the headswitch is operative to couple the power supply to the load circuit when the headswitch is enabled and to cut off the power supply from the load circuit when the headswitch is disabled;
• a charge pump coupled to the headswitch, the charge pump selectively enabled based on a charge pump control signal, and operative to control the headswitch based at least in part on the charge pump control signal;
• an analog-to-digital converter (ADC) coupled to the headswitch;
• and
• a controller coupled to the ADC and the charge pump, wherein the controller, charge pump, headswitch, and ADC are coupled in a feedback configuration to implement a digital voltage regulator, wherein the ADC is operative to convert a load supply voltage provided by the headswitch to the load circuit into a digital signal, wherein the controller is operative to provide a digital control for the charge pump based on the digital signal from the ADC and a digital target value, and wherein the digital control maintains a load supply provided by the headswitch to the load circuit at a selected voltage.

A wireless communication device in a communication system, the device comprising:

• a load circuit comprised of at least one field effect transistor (FET) device;
• a headswitch comprised of at least one N-channel FET (N-FET) device and coupled between a power supply and the load circuit, wherein the headswitch is operative to couple the power supply to the load circuit when the headswitch is enabled and to cut off the power supply from the load circuit when the headswitch is disabled;
• a charge pump coupled to the headswitch, the charge pump selectively enabled based on a charge pump control signal, and operative to control the headswitch based at least in part on the charge pump control signal;
• an analog-to-digital converter (ADC) coupled to the headswitch;
• and
• a controller coupled to the ADC and the charge pump, wherein the controller, charge pump, headswitch, and ADC are coupled in a feedback configuration to implement a digital voltage regulator, wherein the ADC is operative to convert a load supply voltage provided by the headswitch to the load circuit into a digital signal, wherein the controller is operative to provide a digital control for the charge pump based on the digital signal from the ADC and a digital target value, and wherein the digital control maintains a load supply provided by the headswitch to the load circuit at a selected voltage.